| Kyle Swenson | 8d8f654 | 2021-03-15 11:02:55 -0600 | [diff] [blame^] | 1 | /* |
| 2 | * arch/arm/mach-omap1/include/mach/lcdc.h |
| 3 | * |
| 4 | * Extracted from drivers/video/omap/lcdc.c |
| 5 | * Copyright (C) 2004 Nokia Corporation |
| 6 | * Author: Imre Deak <imre.deak@nokia.com> |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify it |
| 9 | * under the terms of the GNU General Public License as published by the |
| 10 | * Free Software Foundation; either version 2 of the License, or (at your |
| 11 | * option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, but |
| 14 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 16 | * General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License along |
| 19 | * with this program; if not, write to the Free Software Foundation, Inc., |
| 20 | * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. |
| 21 | */ |
| 22 | #ifndef __MACH_LCDC_H__ |
| 23 | #define __MACH_LCDC_H__ |
| 24 | |
| 25 | #define OMAP_LCDC_BASE 0xfffec000 |
| 26 | #define OMAP_LCDC_SIZE 256 |
| 27 | #define OMAP_LCDC_IRQ INT_LCD_CTRL |
| 28 | |
| 29 | #define OMAP_LCDC_CONTROL (OMAP_LCDC_BASE + 0x00) |
| 30 | #define OMAP_LCDC_TIMING0 (OMAP_LCDC_BASE + 0x04) |
| 31 | #define OMAP_LCDC_TIMING1 (OMAP_LCDC_BASE + 0x08) |
| 32 | #define OMAP_LCDC_TIMING2 (OMAP_LCDC_BASE + 0x0c) |
| 33 | #define OMAP_LCDC_STATUS (OMAP_LCDC_BASE + 0x10) |
| 34 | #define OMAP_LCDC_SUBPANEL (OMAP_LCDC_BASE + 0x14) |
| 35 | #define OMAP_LCDC_LINE_INT (OMAP_LCDC_BASE + 0x18) |
| 36 | #define OMAP_LCDC_DISPLAY_STATUS (OMAP_LCDC_BASE + 0x1c) |
| 37 | |
| 38 | #define OMAP_LCDC_STAT_DONE (1 << 0) |
| 39 | #define OMAP_LCDC_STAT_VSYNC (1 << 1) |
| 40 | #define OMAP_LCDC_STAT_SYNC_LOST (1 << 2) |
| 41 | #define OMAP_LCDC_STAT_ABC (1 << 3) |
| 42 | #define OMAP_LCDC_STAT_LINE_INT (1 << 4) |
| 43 | #define OMAP_LCDC_STAT_FUF (1 << 5) |
| 44 | #define OMAP_LCDC_STAT_LOADED_PALETTE (1 << 6) |
| 45 | |
| 46 | #define OMAP_LCDC_CTRL_LCD_EN (1 << 0) |
| 47 | #define OMAP_LCDC_CTRL_LCD_TFT (1 << 7) |
| 48 | #define OMAP_LCDC_CTRL_LINE_IRQ_CLR_SEL (1 << 10) |
| 49 | |
| 50 | #define OMAP_LCDC_IRQ_VSYNC (1 << 2) |
| 51 | #define OMAP_LCDC_IRQ_DONE (1 << 3) |
| 52 | #define OMAP_LCDC_IRQ_LOADED_PALETTE (1 << 4) |
| 53 | #define OMAP_LCDC_IRQ_LINE_NIRQ (1 << 5) |
| 54 | #define OMAP_LCDC_IRQ_LINE (1 << 6) |
| 55 | #define OMAP_LCDC_IRQ_MASK (((1 << 5) - 1) << 2) |
| 56 | |
| 57 | #endif /* __MACH_LCDC_H__ */ |