Kyle Swenson | 8d8f654 | 2021-03-15 11:02:55 -0600 | [diff] [blame^] | 1 | /* linux/arch/arm/mach-s3c2440/mach-smdk2440.c |
| 2 | * |
| 3 | * Copyright (c) 2004-2005 Simtec Electronics |
| 4 | * Ben Dooks <ben@simtec.co.uk> |
| 5 | * |
| 6 | * http://www.fluff.org/ben/smdk2440/ |
| 7 | * |
| 8 | * Thanks to Dimity Andric and TomTom for the loan of an SMDK2440. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License version 2 as |
| 12 | * published by the Free Software Foundation. |
| 13 | * |
| 14 | */ |
| 15 | |
| 16 | #include <linux/kernel.h> |
| 17 | #include <linux/types.h> |
| 18 | #include <linux/interrupt.h> |
| 19 | #include <linux/list.h> |
| 20 | #include <linux/timer.h> |
| 21 | #include <linux/init.h> |
| 22 | #include <linux/serial_core.h> |
| 23 | #include <linux/serial_s3c.h> |
| 24 | #include <linux/platform_device.h> |
| 25 | #include <linux/io.h> |
| 26 | |
| 27 | #include <asm/mach/arch.h> |
| 28 | #include <asm/mach/map.h> |
| 29 | #include <asm/mach/irq.h> |
| 30 | |
| 31 | #include <mach/hardware.h> |
| 32 | #include <asm/irq.h> |
| 33 | #include <asm/mach-types.h> |
| 34 | |
| 35 | #include <mach/regs-gpio.h> |
| 36 | #include <mach/regs-lcd.h> |
| 37 | |
| 38 | #include <mach/fb.h> |
| 39 | #include <linux/platform_data/i2c-s3c2410.h> |
| 40 | |
| 41 | #include <plat/devs.h> |
| 42 | #include <plat/cpu.h> |
| 43 | #include <plat/samsung-time.h> |
| 44 | |
| 45 | #include "common.h" |
| 46 | #include "common-smdk.h" |
| 47 | |
| 48 | static struct map_desc smdk2440_iodesc[] __initdata = { |
| 49 | /* ISA IO Space map (memory space selected by A24) */ |
| 50 | |
| 51 | { |
| 52 | .virtual = (u32)S3C24XX_VA_ISA_WORD, |
| 53 | .pfn = __phys_to_pfn(S3C2410_CS2), |
| 54 | .length = 0x10000, |
| 55 | .type = MT_DEVICE, |
| 56 | }, { |
| 57 | .virtual = (u32)S3C24XX_VA_ISA_WORD + 0x10000, |
| 58 | .pfn = __phys_to_pfn(S3C2410_CS2 + (1<<24)), |
| 59 | .length = SZ_4M, |
| 60 | .type = MT_DEVICE, |
| 61 | }, { |
| 62 | .virtual = (u32)S3C24XX_VA_ISA_BYTE, |
| 63 | .pfn = __phys_to_pfn(S3C2410_CS2), |
| 64 | .length = 0x10000, |
| 65 | .type = MT_DEVICE, |
| 66 | }, { |
| 67 | .virtual = (u32)S3C24XX_VA_ISA_BYTE + 0x10000, |
| 68 | .pfn = __phys_to_pfn(S3C2410_CS2 + (1<<24)), |
| 69 | .length = SZ_4M, |
| 70 | .type = MT_DEVICE, |
| 71 | } |
| 72 | }; |
| 73 | |
| 74 | #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK |
| 75 | #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB |
| 76 | #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE |
| 77 | |
| 78 | static struct s3c2410_uartcfg smdk2440_uartcfgs[] __initdata = { |
| 79 | [0] = { |
| 80 | .hwport = 0, |
| 81 | .flags = 0, |
| 82 | .ucon = 0x3c5, |
| 83 | .ulcon = 0x03, |
| 84 | .ufcon = 0x51, |
| 85 | }, |
| 86 | [1] = { |
| 87 | .hwport = 1, |
| 88 | .flags = 0, |
| 89 | .ucon = 0x3c5, |
| 90 | .ulcon = 0x03, |
| 91 | .ufcon = 0x51, |
| 92 | }, |
| 93 | /* IR port */ |
| 94 | [2] = { |
| 95 | .hwport = 2, |
| 96 | .flags = 0, |
| 97 | .ucon = 0x3c5, |
| 98 | .ulcon = 0x43, |
| 99 | .ufcon = 0x51, |
| 100 | } |
| 101 | }; |
| 102 | |
| 103 | /* LCD driver info */ |
| 104 | |
| 105 | static struct s3c2410fb_display smdk2440_lcd_cfg __initdata = { |
| 106 | |
| 107 | .lcdcon5 = S3C2410_LCDCON5_FRM565 | |
| 108 | S3C2410_LCDCON5_INVVLINE | |
| 109 | S3C2410_LCDCON5_INVVFRAME | |
| 110 | S3C2410_LCDCON5_PWREN | |
| 111 | S3C2410_LCDCON5_HWSWP, |
| 112 | |
| 113 | .type = S3C2410_LCDCON1_TFT, |
| 114 | |
| 115 | .width = 240, |
| 116 | .height = 320, |
| 117 | |
| 118 | .pixclock = 166667, /* HCLK 60 MHz, divisor 10 */ |
| 119 | .xres = 240, |
| 120 | .yres = 320, |
| 121 | .bpp = 16, |
| 122 | .left_margin = 20, |
| 123 | .right_margin = 8, |
| 124 | .hsync_len = 4, |
| 125 | .upper_margin = 8, |
| 126 | .lower_margin = 7, |
| 127 | .vsync_len = 4, |
| 128 | }; |
| 129 | |
| 130 | static struct s3c2410fb_mach_info smdk2440_fb_info __initdata = { |
| 131 | .displays = &smdk2440_lcd_cfg, |
| 132 | .num_displays = 1, |
| 133 | .default_display = 0, |
| 134 | |
| 135 | #if 0 |
| 136 | /* currently setup by downloader */ |
| 137 | .gpccon = 0xaa940659, |
| 138 | .gpccon_mask = 0xffffffff, |
| 139 | .gpcup = 0x0000ffff, |
| 140 | .gpcup_mask = 0xffffffff, |
| 141 | .gpdcon = 0xaa84aaa0, |
| 142 | .gpdcon_mask = 0xffffffff, |
| 143 | .gpdup = 0x0000faff, |
| 144 | .gpdup_mask = 0xffffffff, |
| 145 | #endif |
| 146 | |
| 147 | .lpcsel = ((0xCE6) & ~7) | 1<<4, |
| 148 | }; |
| 149 | |
| 150 | static struct platform_device *smdk2440_devices[] __initdata = { |
| 151 | &s3c_device_ohci, |
| 152 | &s3c_device_lcd, |
| 153 | &s3c_device_wdt, |
| 154 | &s3c_device_i2c0, |
| 155 | &s3c_device_iis, |
| 156 | }; |
| 157 | |
| 158 | static void __init smdk2440_map_io(void) |
| 159 | { |
| 160 | s3c24xx_init_io(smdk2440_iodesc, ARRAY_SIZE(smdk2440_iodesc)); |
| 161 | s3c24xx_init_uarts(smdk2440_uartcfgs, ARRAY_SIZE(smdk2440_uartcfgs)); |
| 162 | samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4); |
| 163 | } |
| 164 | |
| 165 | static void __init smdk2440_init_time(void) |
| 166 | { |
| 167 | s3c2440_init_clocks(16934400); |
| 168 | samsung_timer_init(); |
| 169 | } |
| 170 | |
| 171 | static void __init smdk2440_machine_init(void) |
| 172 | { |
| 173 | s3c24xx_fb_set_platdata(&smdk2440_fb_info); |
| 174 | s3c_i2c0_set_platdata(NULL); |
| 175 | |
| 176 | platform_add_devices(smdk2440_devices, ARRAY_SIZE(smdk2440_devices)); |
| 177 | smdk_machine_init(); |
| 178 | } |
| 179 | |
| 180 | MACHINE_START(S3C2440, "SMDK2440") |
| 181 | /* Maintainer: Ben Dooks <ben-linux@fluff.org> */ |
| 182 | .atag_offset = 0x100, |
| 183 | |
| 184 | .init_irq = s3c2440_init_irq, |
| 185 | .map_io = smdk2440_map_io, |
| 186 | .init_machine = smdk2440_machine_init, |
| 187 | .init_time = smdk2440_init_time, |
| 188 | MACHINE_END |