| Kyle Swenson | 8d8f654 | 2021-03-15 11:02:55 -0600 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (C) 2001, 2002, MontaVista Software Inc. |
| 3 | * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net |
| 4 | * Copyright (c) 2003 Maciej W. Rozycki |
| 5 | * |
| 6 | * include/asm-mips/time.h |
| 7 | * header file for the new style time.c file and time services. |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify it |
| 10 | * under the terms of the GNU General Public License as published by the |
| 11 | * Free Software Foundation; either version 2 of the License, or (at your |
| 12 | * option) any later version. |
| 13 | */ |
| 14 | #ifndef _ASM_TIME_H |
| 15 | #define _ASM_TIME_H |
| 16 | |
| 17 | #include <linux/rtc.h> |
| 18 | #include <linux/spinlock.h> |
| 19 | #include <linux/clockchips.h> |
| 20 | #include <linux/clocksource.h> |
| 21 | |
| 22 | extern spinlock_t rtc_lock; |
| 23 | |
| 24 | /* |
| 25 | * RTC ops. By default, they point to weak no-op RTC functions. |
| 26 | * rtc_mips_set_time - reverse the above translation and set time to RTC. |
| 27 | * rtc_mips_set_mmss - similar to rtc_set_time, but only min and sec need |
| 28 | * to be set. Used by RTC sync-up. |
| 29 | */ |
| 30 | extern int rtc_mips_set_time(unsigned long); |
| 31 | extern int rtc_mips_set_mmss(unsigned long); |
| 32 | |
| 33 | /* |
| 34 | * board specific routines required by time_init(). |
| 35 | */ |
| 36 | extern void plat_time_init(void); |
| 37 | |
| 38 | /* |
| 39 | * mips_hpt_frequency - must be set if you intend to use an R4k-compatible |
| 40 | * counter as a timer interrupt source. |
| 41 | */ |
| 42 | extern unsigned int mips_hpt_frequency; |
| 43 | |
| 44 | /* |
| 45 | * The performance counter IRQ on MIPS is a close relative to the timer IRQ |
| 46 | * so it lives here. |
| 47 | */ |
| 48 | extern int (*perf_irq)(void); |
| 49 | extern int __weak get_c0_perfcount_int(void); |
| 50 | |
| 51 | /* |
| 52 | * Initialize the calling CPU's compare interrupt as clockevent device |
| 53 | */ |
| 54 | extern unsigned int get_c0_compare_int(void); |
| 55 | extern int r4k_clockevent_init(void); |
| 56 | |
| 57 | static inline int mips_clockevent_init(void) |
| 58 | { |
| 59 | #ifdef CONFIG_CEVT_R4K |
| 60 | return r4k_clockevent_init(); |
| 61 | #else |
| 62 | return -ENXIO; |
| 63 | #endif |
| 64 | } |
| 65 | |
| 66 | /* |
| 67 | * Initialize the count register as a clocksource |
| 68 | */ |
| 69 | extern int init_r4k_clocksource(void); |
| 70 | |
| 71 | static inline int init_mips_clocksource(void) |
| 72 | { |
| 73 | #ifdef CONFIG_CSRC_R4K |
| 74 | return init_r4k_clocksource(); |
| 75 | #else |
| 76 | return 0; |
| 77 | #endif |
| 78 | } |
| 79 | |
| 80 | static inline void clockevent_set_clock(struct clock_event_device *cd, |
| 81 | unsigned int clock) |
| 82 | { |
| 83 | clockevents_calc_mult_shift(cd, clock, 4); |
| 84 | } |
| 85 | |
| 86 | #endif /* _ASM_TIME_H */ |