Kyle Swenson | 8d8f654 | 2021-03-15 11:02:55 -0600 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (C) 2012,2013 Infineon Technologies |
| 3 | * |
| 4 | * Authors: |
| 5 | * Peter Huewe <peter.huewe@infineon.com> |
| 6 | * |
| 7 | * Device driver for TCG/TCPA TPM (trusted platform module). |
| 8 | * Specifications at www.trustedcomputinggroup.org |
| 9 | * |
| 10 | * This device driver implements the TPM interface as defined in |
| 11 | * the TCG TPM Interface Spec version 1.2, revision 1.0 and the |
| 12 | * Infineon I2C Protocol Stack Specification v0.20. |
| 13 | * |
| 14 | * It is based on the original tpm_tis device driver from Leendert van |
| 15 | * Dorn and Kyleen Hall. |
| 16 | * |
| 17 | * This program is free software; you can redistribute it and/or |
| 18 | * modify it under the terms of the GNU General Public License as |
| 19 | * published by the Free Software Foundation, version 2 of the |
| 20 | * License. |
| 21 | * |
| 22 | * |
| 23 | */ |
| 24 | #include <linux/i2c.h> |
| 25 | #include <linux/module.h> |
| 26 | #include <linux/wait.h> |
| 27 | #include "tpm.h" |
| 28 | |
| 29 | /* max. buffer size supported by our TPM */ |
| 30 | #define TPM_BUFSIZE 1260 |
| 31 | |
| 32 | /* max. number of iterations after I2C NAK */ |
| 33 | #define MAX_COUNT 3 |
| 34 | |
| 35 | #define SLEEP_DURATION_LOW 55 |
| 36 | #define SLEEP_DURATION_HI 65 |
| 37 | |
| 38 | /* max. number of iterations after I2C NAK for 'long' commands |
| 39 | * we need this especially for sending TPM_READY, since the cleanup after the |
| 40 | * transtion to the ready state may take some time, but it is unpredictable |
| 41 | * how long it will take. |
| 42 | */ |
| 43 | #define MAX_COUNT_LONG 50 |
| 44 | |
| 45 | #define SLEEP_DURATION_LONG_LOW 200 |
| 46 | #define SLEEP_DURATION_LONG_HI 220 |
| 47 | |
| 48 | /* After sending TPM_READY to 'reset' the TPM we have to sleep even longer */ |
| 49 | #define SLEEP_DURATION_RESET_LOW 2400 |
| 50 | #define SLEEP_DURATION_RESET_HI 2600 |
| 51 | |
| 52 | /* we want to use usleep_range instead of msleep for the 5ms TPM_TIMEOUT */ |
| 53 | #define TPM_TIMEOUT_US_LOW (TPM_TIMEOUT * 1000) |
| 54 | #define TPM_TIMEOUT_US_HI (TPM_TIMEOUT_US_LOW + 2000) |
| 55 | |
| 56 | /* expected value for DIDVID register */ |
| 57 | #define TPM_TIS_I2C_DID_VID_9635 0xd1150b00L |
| 58 | #define TPM_TIS_I2C_DID_VID_9645 0x001a15d1L |
| 59 | |
| 60 | enum i2c_chip_type { |
| 61 | SLB9635, |
| 62 | SLB9645, |
| 63 | UNKNOWN, |
| 64 | }; |
| 65 | |
| 66 | /* Structure to store I2C TPM specific stuff */ |
| 67 | struct tpm_inf_dev { |
| 68 | struct i2c_client *client; |
| 69 | u8 buf[TPM_BUFSIZE + sizeof(u8)]; /* max. buffer size + addr */ |
| 70 | struct tpm_chip *chip; |
| 71 | enum i2c_chip_type chip_type; |
| 72 | }; |
| 73 | |
| 74 | static struct tpm_inf_dev tpm_dev; |
| 75 | |
| 76 | /* |
| 77 | * iic_tpm_read() - read from TPM register |
| 78 | * @addr: register address to read from |
| 79 | * @buffer: provided by caller |
| 80 | * @len: number of bytes to read |
| 81 | * |
| 82 | * Read len bytes from TPM register and put them into |
| 83 | * buffer (little-endian format, i.e. first byte is put into buffer[0]). |
| 84 | * |
| 85 | * NOTE: TPM is big-endian for multi-byte values. Multi-byte |
| 86 | * values have to be swapped. |
| 87 | * |
| 88 | * NOTE: We can't unfortunately use the combined read/write functions |
| 89 | * provided by the i2c core as the TPM currently does not support the |
| 90 | * repeated start condition and due to it's special requirements. |
| 91 | * The i2c_smbus* functions do not work for this chip. |
| 92 | * |
| 93 | * Return -EIO on error, 0 on success. |
| 94 | */ |
| 95 | static int iic_tpm_read(u8 addr, u8 *buffer, size_t len) |
| 96 | { |
| 97 | |
| 98 | struct i2c_msg msg1 = { |
| 99 | .addr = tpm_dev.client->addr, |
| 100 | .len = 1, |
| 101 | .buf = &addr |
| 102 | }; |
| 103 | struct i2c_msg msg2 = { |
| 104 | .addr = tpm_dev.client->addr, |
| 105 | .flags = I2C_M_RD, |
| 106 | .len = len, |
| 107 | .buf = buffer |
| 108 | }; |
| 109 | struct i2c_msg msgs[] = {msg1, msg2}; |
| 110 | |
| 111 | int rc = 0; |
| 112 | int count; |
| 113 | |
| 114 | /* Lock the adapter for the duration of the whole sequence. */ |
| 115 | if (!tpm_dev.client->adapter->algo->master_xfer) |
| 116 | return -EOPNOTSUPP; |
| 117 | i2c_lock_adapter(tpm_dev.client->adapter); |
| 118 | |
| 119 | if (tpm_dev.chip_type == SLB9645) { |
| 120 | /* use a combined read for newer chips |
| 121 | * unfortunately the smbus functions are not suitable due to |
| 122 | * the 32 byte limit of the smbus. |
| 123 | * retries should usually not be needed, but are kept just to |
| 124 | * be on the safe side. |
| 125 | */ |
| 126 | for (count = 0; count < MAX_COUNT; count++) { |
| 127 | rc = __i2c_transfer(tpm_dev.client->adapter, msgs, 2); |
| 128 | if (rc > 0) |
| 129 | break; /* break here to skip sleep */ |
| 130 | usleep_range(SLEEP_DURATION_LOW, SLEEP_DURATION_HI); |
| 131 | } |
| 132 | } else { |
| 133 | /* slb9635 protocol should work in all cases */ |
| 134 | for (count = 0; count < MAX_COUNT; count++) { |
| 135 | rc = __i2c_transfer(tpm_dev.client->adapter, &msg1, 1); |
| 136 | if (rc > 0) |
| 137 | break; /* break here to skip sleep */ |
| 138 | |
| 139 | usleep_range(SLEEP_DURATION_LOW, SLEEP_DURATION_HI); |
| 140 | } |
| 141 | |
| 142 | if (rc <= 0) |
| 143 | goto out; |
| 144 | |
| 145 | /* After the TPM has successfully received the register address |
| 146 | * it needs some time, thus we're sleeping here again, before |
| 147 | * retrieving the data |
| 148 | */ |
| 149 | for (count = 0; count < MAX_COUNT; count++) { |
| 150 | usleep_range(SLEEP_DURATION_LOW, SLEEP_DURATION_HI); |
| 151 | rc = __i2c_transfer(tpm_dev.client->adapter, &msg2, 1); |
| 152 | if (rc > 0) |
| 153 | break; |
| 154 | } |
| 155 | } |
| 156 | |
| 157 | out: |
| 158 | i2c_unlock_adapter(tpm_dev.client->adapter); |
| 159 | /* take care of 'guard time' */ |
| 160 | usleep_range(SLEEP_DURATION_LOW, SLEEP_DURATION_HI); |
| 161 | |
| 162 | /* __i2c_transfer returns the number of successfully transferred |
| 163 | * messages. |
| 164 | * So rc should be greater than 0 here otherwise we have an error. |
| 165 | */ |
| 166 | if (rc <= 0) |
| 167 | return -EIO; |
| 168 | |
| 169 | return 0; |
| 170 | } |
| 171 | |
| 172 | static int iic_tpm_write_generic(u8 addr, u8 *buffer, size_t len, |
| 173 | unsigned int sleep_low, |
| 174 | unsigned int sleep_hi, u8 max_count) |
| 175 | { |
| 176 | int rc = -EIO; |
| 177 | int count; |
| 178 | |
| 179 | struct i2c_msg msg1 = { |
| 180 | .addr = tpm_dev.client->addr, |
| 181 | .len = len + 1, |
| 182 | .buf = tpm_dev.buf |
| 183 | }; |
| 184 | |
| 185 | if (len > TPM_BUFSIZE) |
| 186 | return -EINVAL; |
| 187 | |
| 188 | if (!tpm_dev.client->adapter->algo->master_xfer) |
| 189 | return -EOPNOTSUPP; |
| 190 | i2c_lock_adapter(tpm_dev.client->adapter); |
| 191 | |
| 192 | /* prepend the 'register address' to the buffer */ |
| 193 | tpm_dev.buf[0] = addr; |
| 194 | memcpy(&(tpm_dev.buf[1]), buffer, len); |
| 195 | |
| 196 | /* |
| 197 | * NOTE: We have to use these special mechanisms here and unfortunately |
| 198 | * cannot rely on the standard behavior of i2c_transfer. |
| 199 | * Even for newer chips the smbus functions are not |
| 200 | * suitable due to the 32 byte limit of the smbus. |
| 201 | */ |
| 202 | for (count = 0; count < max_count; count++) { |
| 203 | rc = __i2c_transfer(tpm_dev.client->adapter, &msg1, 1); |
| 204 | if (rc > 0) |
| 205 | break; |
| 206 | usleep_range(sleep_low, sleep_hi); |
| 207 | } |
| 208 | |
| 209 | i2c_unlock_adapter(tpm_dev.client->adapter); |
| 210 | /* take care of 'guard time' */ |
| 211 | usleep_range(SLEEP_DURATION_LOW, SLEEP_DURATION_HI); |
| 212 | |
| 213 | /* __i2c_transfer returns the number of successfully transferred |
| 214 | * messages. |
| 215 | * So rc should be greater than 0 here otherwise we have an error. |
| 216 | */ |
| 217 | if (rc <= 0) |
| 218 | return -EIO; |
| 219 | |
| 220 | return 0; |
| 221 | } |
| 222 | |
| 223 | /* |
| 224 | * iic_tpm_write() - write to TPM register |
| 225 | * @addr: register address to write to |
| 226 | * @buffer: containing data to be written |
| 227 | * @len: number of bytes to write |
| 228 | * |
| 229 | * Write len bytes from provided buffer to TPM register (little |
| 230 | * endian format, i.e. buffer[0] is written as first byte). |
| 231 | * |
| 232 | * NOTE: TPM is big-endian for multi-byte values. Multi-byte |
| 233 | * values have to be swapped. |
| 234 | * |
| 235 | * NOTE: use this function instead of the iic_tpm_write_generic function. |
| 236 | * |
| 237 | * Return -EIO on error, 0 on success |
| 238 | */ |
| 239 | static int iic_tpm_write(u8 addr, u8 *buffer, size_t len) |
| 240 | { |
| 241 | return iic_tpm_write_generic(addr, buffer, len, SLEEP_DURATION_LOW, |
| 242 | SLEEP_DURATION_HI, MAX_COUNT); |
| 243 | } |
| 244 | |
| 245 | /* |
| 246 | * This function is needed especially for the cleanup situation after |
| 247 | * sending TPM_READY |
| 248 | * */ |
| 249 | static int iic_tpm_write_long(u8 addr, u8 *buffer, size_t len) |
| 250 | { |
| 251 | return iic_tpm_write_generic(addr, buffer, len, SLEEP_DURATION_LONG_LOW, |
| 252 | SLEEP_DURATION_LONG_HI, MAX_COUNT_LONG); |
| 253 | } |
| 254 | |
| 255 | enum tis_access { |
| 256 | TPM_ACCESS_VALID = 0x80, |
| 257 | TPM_ACCESS_ACTIVE_LOCALITY = 0x20, |
| 258 | TPM_ACCESS_REQUEST_PENDING = 0x04, |
| 259 | TPM_ACCESS_REQUEST_USE = 0x02, |
| 260 | }; |
| 261 | |
| 262 | enum tis_status { |
| 263 | TPM_STS_VALID = 0x80, |
| 264 | TPM_STS_COMMAND_READY = 0x40, |
| 265 | TPM_STS_GO = 0x20, |
| 266 | TPM_STS_DATA_AVAIL = 0x10, |
| 267 | TPM_STS_DATA_EXPECT = 0x08, |
| 268 | }; |
| 269 | |
| 270 | enum tis_defaults { |
| 271 | TIS_SHORT_TIMEOUT = 750, /* ms */ |
| 272 | TIS_LONG_TIMEOUT = 2000, /* 2 sec */ |
| 273 | }; |
| 274 | |
| 275 | #define TPM_ACCESS(l) (0x0000 | ((l) << 4)) |
| 276 | #define TPM_STS(l) (0x0001 | ((l) << 4)) |
| 277 | #define TPM_DATA_FIFO(l) (0x0005 | ((l) << 4)) |
| 278 | #define TPM_DID_VID(l) (0x0006 | ((l) << 4)) |
| 279 | |
| 280 | static int check_locality(struct tpm_chip *chip, int loc) |
| 281 | { |
| 282 | u8 buf; |
| 283 | int rc; |
| 284 | |
| 285 | rc = iic_tpm_read(TPM_ACCESS(loc), &buf, 1); |
| 286 | if (rc < 0) |
| 287 | return rc; |
| 288 | |
| 289 | if ((buf & (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) == |
| 290 | (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) { |
| 291 | chip->vendor.locality = loc; |
| 292 | return loc; |
| 293 | } |
| 294 | |
| 295 | return -EIO; |
| 296 | } |
| 297 | |
| 298 | /* implementation similar to tpm_tis */ |
| 299 | static void release_locality(struct tpm_chip *chip, int loc, int force) |
| 300 | { |
| 301 | u8 buf; |
| 302 | if (iic_tpm_read(TPM_ACCESS(loc), &buf, 1) < 0) |
| 303 | return; |
| 304 | |
| 305 | if (force || (buf & (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) == |
| 306 | (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) { |
| 307 | buf = TPM_ACCESS_ACTIVE_LOCALITY; |
| 308 | iic_tpm_write(TPM_ACCESS(loc), &buf, 1); |
| 309 | } |
| 310 | } |
| 311 | |
| 312 | static int request_locality(struct tpm_chip *chip, int loc) |
| 313 | { |
| 314 | unsigned long stop; |
| 315 | u8 buf = TPM_ACCESS_REQUEST_USE; |
| 316 | |
| 317 | if (check_locality(chip, loc) >= 0) |
| 318 | return loc; |
| 319 | |
| 320 | iic_tpm_write(TPM_ACCESS(loc), &buf, 1); |
| 321 | |
| 322 | /* wait for burstcount */ |
| 323 | stop = jiffies + chip->vendor.timeout_a; |
| 324 | do { |
| 325 | if (check_locality(chip, loc) >= 0) |
| 326 | return loc; |
| 327 | usleep_range(TPM_TIMEOUT_US_LOW, TPM_TIMEOUT_US_HI); |
| 328 | } while (time_before(jiffies, stop)); |
| 329 | |
| 330 | return -ETIME; |
| 331 | } |
| 332 | |
| 333 | static u8 tpm_tis_i2c_status(struct tpm_chip *chip) |
| 334 | { |
| 335 | /* NOTE: since I2C read may fail, return 0 in this case --> time-out */ |
| 336 | u8 buf = 0xFF; |
| 337 | u8 i = 0; |
| 338 | |
| 339 | do { |
| 340 | if (iic_tpm_read(TPM_STS(chip->vendor.locality), &buf, 1) < 0) |
| 341 | return 0; |
| 342 | |
| 343 | i++; |
| 344 | /* if locallity is set STS should not be 0xFF */ |
| 345 | } while ((buf == 0xFF) && i < 10); |
| 346 | |
| 347 | return buf; |
| 348 | } |
| 349 | |
| 350 | static void tpm_tis_i2c_ready(struct tpm_chip *chip) |
| 351 | { |
| 352 | /* this causes the current command to be aborted */ |
| 353 | u8 buf = TPM_STS_COMMAND_READY; |
| 354 | iic_tpm_write_long(TPM_STS(chip->vendor.locality), &buf, 1); |
| 355 | } |
| 356 | |
| 357 | static ssize_t get_burstcount(struct tpm_chip *chip) |
| 358 | { |
| 359 | unsigned long stop; |
| 360 | ssize_t burstcnt; |
| 361 | u8 buf[3]; |
| 362 | |
| 363 | /* wait for burstcount */ |
| 364 | /* which timeout value, spec has 2 answers (c & d) */ |
| 365 | stop = jiffies + chip->vendor.timeout_d; |
| 366 | do { |
| 367 | /* Note: STS is little endian */ |
| 368 | if (iic_tpm_read(TPM_STS(chip->vendor.locality)+1, buf, 3) < 0) |
| 369 | burstcnt = 0; |
| 370 | else |
| 371 | burstcnt = (buf[2] << 16) + (buf[1] << 8) + buf[0]; |
| 372 | |
| 373 | if (burstcnt) |
| 374 | return burstcnt; |
| 375 | |
| 376 | usleep_range(TPM_TIMEOUT_US_LOW, TPM_TIMEOUT_US_HI); |
| 377 | } while (time_before(jiffies, stop)); |
| 378 | return -EBUSY; |
| 379 | } |
| 380 | |
| 381 | static int wait_for_stat(struct tpm_chip *chip, u8 mask, unsigned long timeout, |
| 382 | int *status) |
| 383 | { |
| 384 | unsigned long stop; |
| 385 | |
| 386 | /* check current status */ |
| 387 | *status = tpm_tis_i2c_status(chip); |
| 388 | if ((*status != 0xFF) && (*status & mask) == mask) |
| 389 | return 0; |
| 390 | |
| 391 | stop = jiffies + timeout; |
| 392 | do { |
| 393 | /* since we just checked the status, give the TPM some time */ |
| 394 | usleep_range(TPM_TIMEOUT_US_LOW, TPM_TIMEOUT_US_HI); |
| 395 | *status = tpm_tis_i2c_status(chip); |
| 396 | if ((*status & mask) == mask) |
| 397 | return 0; |
| 398 | |
| 399 | } while (time_before(jiffies, stop)); |
| 400 | |
| 401 | return -ETIME; |
| 402 | } |
| 403 | |
| 404 | static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count) |
| 405 | { |
| 406 | size_t size = 0; |
| 407 | ssize_t burstcnt; |
| 408 | u8 retries = 0; |
| 409 | int rc; |
| 410 | |
| 411 | while (size < count) { |
| 412 | burstcnt = get_burstcount(chip); |
| 413 | |
| 414 | /* burstcnt < 0 = TPM is busy */ |
| 415 | if (burstcnt < 0) |
| 416 | return burstcnt; |
| 417 | |
| 418 | /* limit received data to max. left */ |
| 419 | if (burstcnt > (count - size)) |
| 420 | burstcnt = count - size; |
| 421 | |
| 422 | rc = iic_tpm_read(TPM_DATA_FIFO(chip->vendor.locality), |
| 423 | &(buf[size]), burstcnt); |
| 424 | if (rc == 0) |
| 425 | size += burstcnt; |
| 426 | else if (rc < 0) |
| 427 | retries++; |
| 428 | |
| 429 | /* avoid endless loop in case of broken HW */ |
| 430 | if (retries > MAX_COUNT_LONG) |
| 431 | return -EIO; |
| 432 | } |
| 433 | return size; |
| 434 | } |
| 435 | |
| 436 | static int tpm_tis_i2c_recv(struct tpm_chip *chip, u8 *buf, size_t count) |
| 437 | { |
| 438 | int size = 0; |
| 439 | int expected, status; |
| 440 | |
| 441 | if (count < TPM_HEADER_SIZE) { |
| 442 | size = -EIO; |
| 443 | goto out; |
| 444 | } |
| 445 | |
| 446 | /* read first 10 bytes, including tag, paramsize, and result */ |
| 447 | size = recv_data(chip, buf, TPM_HEADER_SIZE); |
| 448 | if (size < TPM_HEADER_SIZE) { |
| 449 | dev_err(&chip->dev, "Unable to read header\n"); |
| 450 | goto out; |
| 451 | } |
| 452 | |
| 453 | expected = be32_to_cpu(*(__be32 *)(buf + 2)); |
| 454 | if ((size_t) expected > count) { |
| 455 | size = -EIO; |
| 456 | goto out; |
| 457 | } |
| 458 | |
| 459 | size += recv_data(chip, &buf[TPM_HEADER_SIZE], |
| 460 | expected - TPM_HEADER_SIZE); |
| 461 | if (size < expected) { |
| 462 | dev_err(&chip->dev, "Unable to read remainder of result\n"); |
| 463 | size = -ETIME; |
| 464 | goto out; |
| 465 | } |
| 466 | |
| 467 | wait_for_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c, &status); |
| 468 | if (status & TPM_STS_DATA_AVAIL) { /* retry? */ |
| 469 | dev_err(&chip->dev, "Error left over data\n"); |
| 470 | size = -EIO; |
| 471 | goto out; |
| 472 | } |
| 473 | |
| 474 | out: |
| 475 | tpm_tis_i2c_ready(chip); |
| 476 | /* The TPM needs some time to clean up here, |
| 477 | * so we sleep rather than keeping the bus busy |
| 478 | */ |
| 479 | usleep_range(SLEEP_DURATION_RESET_LOW, SLEEP_DURATION_RESET_HI); |
| 480 | release_locality(chip, chip->vendor.locality, 0); |
| 481 | return size; |
| 482 | } |
| 483 | |
| 484 | static int tpm_tis_i2c_send(struct tpm_chip *chip, u8 *buf, size_t len) |
| 485 | { |
| 486 | int rc, status; |
| 487 | ssize_t burstcnt; |
| 488 | size_t count = 0; |
| 489 | u8 retries = 0; |
| 490 | u8 sts = TPM_STS_GO; |
| 491 | |
| 492 | if (len > TPM_BUFSIZE) |
| 493 | return -E2BIG; /* command is too long for our tpm, sorry */ |
| 494 | |
| 495 | if (request_locality(chip, 0) < 0) |
| 496 | return -EBUSY; |
| 497 | |
| 498 | status = tpm_tis_i2c_status(chip); |
| 499 | if ((status & TPM_STS_COMMAND_READY) == 0) { |
| 500 | tpm_tis_i2c_ready(chip); |
| 501 | if (wait_for_stat |
| 502 | (chip, TPM_STS_COMMAND_READY, |
| 503 | chip->vendor.timeout_b, &status) < 0) { |
| 504 | rc = -ETIME; |
| 505 | goto out_err; |
| 506 | } |
| 507 | } |
| 508 | |
| 509 | while (count < len - 1) { |
| 510 | burstcnt = get_burstcount(chip); |
| 511 | |
| 512 | /* burstcnt < 0 = TPM is busy */ |
| 513 | if (burstcnt < 0) |
| 514 | return burstcnt; |
| 515 | |
| 516 | if (burstcnt > (len - 1 - count)) |
| 517 | burstcnt = len - 1 - count; |
| 518 | |
| 519 | rc = iic_tpm_write(TPM_DATA_FIFO(chip->vendor.locality), |
| 520 | &(buf[count]), burstcnt); |
| 521 | if (rc == 0) |
| 522 | count += burstcnt; |
| 523 | else if (rc < 0) |
| 524 | retries++; |
| 525 | |
| 526 | /* avoid endless loop in case of broken HW */ |
| 527 | if (retries > MAX_COUNT_LONG) { |
| 528 | rc = -EIO; |
| 529 | goto out_err; |
| 530 | } |
| 531 | |
| 532 | wait_for_stat(chip, TPM_STS_VALID, |
| 533 | chip->vendor.timeout_c, &status); |
| 534 | |
| 535 | if ((status & TPM_STS_DATA_EXPECT) == 0) { |
| 536 | rc = -EIO; |
| 537 | goto out_err; |
| 538 | } |
| 539 | } |
| 540 | |
| 541 | /* write last byte */ |
| 542 | iic_tpm_write(TPM_DATA_FIFO(chip->vendor.locality), &(buf[count]), 1); |
| 543 | wait_for_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c, &status); |
| 544 | if ((status & TPM_STS_DATA_EXPECT) != 0) { |
| 545 | rc = -EIO; |
| 546 | goto out_err; |
| 547 | } |
| 548 | |
| 549 | /* go and do it */ |
| 550 | iic_tpm_write(TPM_STS(chip->vendor.locality), &sts, 1); |
| 551 | |
| 552 | return len; |
| 553 | out_err: |
| 554 | tpm_tis_i2c_ready(chip); |
| 555 | /* The TPM needs some time to clean up here, |
| 556 | * so we sleep rather than keeping the bus busy |
| 557 | */ |
| 558 | usleep_range(SLEEP_DURATION_RESET_LOW, SLEEP_DURATION_RESET_HI); |
| 559 | release_locality(chip, chip->vendor.locality, 0); |
| 560 | return rc; |
| 561 | } |
| 562 | |
| 563 | static bool tpm_tis_i2c_req_canceled(struct tpm_chip *chip, u8 status) |
| 564 | { |
| 565 | return (status == TPM_STS_COMMAND_READY); |
| 566 | } |
| 567 | |
| 568 | static const struct tpm_class_ops tpm_tis_i2c = { |
| 569 | .status = tpm_tis_i2c_status, |
| 570 | .recv = tpm_tis_i2c_recv, |
| 571 | .send = tpm_tis_i2c_send, |
| 572 | .cancel = tpm_tis_i2c_ready, |
| 573 | .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID, |
| 574 | .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID, |
| 575 | .req_canceled = tpm_tis_i2c_req_canceled, |
| 576 | }; |
| 577 | |
| 578 | static int tpm_tis_i2c_init(struct device *dev) |
| 579 | { |
| 580 | u32 vendor; |
| 581 | int rc = 0; |
| 582 | struct tpm_chip *chip; |
| 583 | |
| 584 | chip = tpmm_chip_alloc(dev, &tpm_tis_i2c); |
| 585 | if (IS_ERR(chip)) |
| 586 | return PTR_ERR(chip); |
| 587 | |
| 588 | /* Disable interrupts */ |
| 589 | chip->vendor.irq = 0; |
| 590 | |
| 591 | /* Default timeouts */ |
| 592 | chip->vendor.timeout_a = msecs_to_jiffies(TIS_SHORT_TIMEOUT); |
| 593 | chip->vendor.timeout_b = msecs_to_jiffies(TIS_LONG_TIMEOUT); |
| 594 | chip->vendor.timeout_c = msecs_to_jiffies(TIS_SHORT_TIMEOUT); |
| 595 | chip->vendor.timeout_d = msecs_to_jiffies(TIS_SHORT_TIMEOUT); |
| 596 | |
| 597 | if (request_locality(chip, 0) != 0) { |
| 598 | dev_err(dev, "could not request locality\n"); |
| 599 | rc = -ENODEV; |
| 600 | goto out_err; |
| 601 | } |
| 602 | |
| 603 | /* read four bytes from DID_VID register */ |
| 604 | if (iic_tpm_read(TPM_DID_VID(0), (u8 *)&vendor, 4) < 0) { |
| 605 | dev_err(dev, "could not read vendor id\n"); |
| 606 | rc = -EIO; |
| 607 | goto out_release; |
| 608 | } |
| 609 | |
| 610 | if (vendor == TPM_TIS_I2C_DID_VID_9645) { |
| 611 | tpm_dev.chip_type = SLB9645; |
| 612 | } else if (vendor == TPM_TIS_I2C_DID_VID_9635) { |
| 613 | tpm_dev.chip_type = SLB9635; |
| 614 | } else { |
| 615 | dev_err(dev, "vendor id did not match! ID was %08x\n", vendor); |
| 616 | rc = -ENODEV; |
| 617 | goto out_release; |
| 618 | } |
| 619 | |
| 620 | dev_info(dev, "1.2 TPM (device-id 0x%X)\n", vendor >> 16); |
| 621 | |
| 622 | INIT_LIST_HEAD(&chip->vendor.list); |
| 623 | tpm_dev.chip = chip; |
| 624 | |
| 625 | tpm_get_timeouts(chip); |
| 626 | tpm_do_selftest(chip); |
| 627 | |
| 628 | return tpm_chip_register(chip); |
| 629 | out_release: |
| 630 | release_locality(chip, chip->vendor.locality, 1); |
| 631 | tpm_dev.client = NULL; |
| 632 | out_err: |
| 633 | return rc; |
| 634 | } |
| 635 | |
| 636 | static const struct i2c_device_id tpm_tis_i2c_table[] = { |
| 637 | {"tpm_i2c_infineon", 0}, |
| 638 | {"slb9635tt", 0}, |
| 639 | {"slb9645tt", 1}, |
| 640 | {}, |
| 641 | }; |
| 642 | |
| 643 | MODULE_DEVICE_TABLE(i2c, tpm_tis_i2c_table); |
| 644 | |
| 645 | #ifdef CONFIG_OF |
| 646 | static const struct of_device_id tpm_tis_i2c_of_match[] = { |
| 647 | { |
| 648 | .name = "tpm_i2c_infineon", |
| 649 | .type = "tpm", |
| 650 | .compatible = "infineon,tpm_i2c_infineon", |
| 651 | .data = (void *)0 |
| 652 | }, |
| 653 | { |
| 654 | .name = "slb9635tt", |
| 655 | .type = "tpm", |
| 656 | .compatible = "infineon,slb9635tt", |
| 657 | .data = (void *)0 |
| 658 | }, |
| 659 | { |
| 660 | .name = "slb9645tt", |
| 661 | .type = "tpm", |
| 662 | .compatible = "infineon,slb9645tt", |
| 663 | .data = (void *)1 |
| 664 | }, |
| 665 | {}, |
| 666 | }; |
| 667 | MODULE_DEVICE_TABLE(of, tpm_tis_i2c_of_match); |
| 668 | #endif |
| 669 | |
| 670 | static SIMPLE_DEV_PM_OPS(tpm_tis_i2c_ops, tpm_pm_suspend, tpm_pm_resume); |
| 671 | |
| 672 | static int tpm_tis_i2c_probe(struct i2c_client *client, |
| 673 | const struct i2c_device_id *id) |
| 674 | { |
| 675 | int rc; |
| 676 | struct device *dev = &(client->dev); |
| 677 | |
| 678 | if (tpm_dev.client != NULL) { |
| 679 | dev_err(dev, "This driver only supports one client at a time\n"); |
| 680 | return -EBUSY; /* We only support one client */ |
| 681 | } |
| 682 | |
| 683 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) { |
| 684 | dev_err(dev, "no algorithms associated to the i2c bus\n"); |
| 685 | return -ENODEV; |
| 686 | } |
| 687 | |
| 688 | tpm_dev.client = client; |
| 689 | rc = tpm_tis_i2c_init(&client->dev); |
| 690 | if (rc != 0) { |
| 691 | tpm_dev.client = NULL; |
| 692 | rc = -ENODEV; |
| 693 | } |
| 694 | return rc; |
| 695 | } |
| 696 | |
| 697 | static int tpm_tis_i2c_remove(struct i2c_client *client) |
| 698 | { |
| 699 | struct tpm_chip *chip = tpm_dev.chip; |
| 700 | |
| 701 | tpm_chip_unregister(chip); |
| 702 | release_locality(chip, chip->vendor.locality, 1); |
| 703 | tpm_dev.client = NULL; |
| 704 | |
| 705 | return 0; |
| 706 | } |
| 707 | |
| 708 | static struct i2c_driver tpm_tis_i2c_driver = { |
| 709 | .id_table = tpm_tis_i2c_table, |
| 710 | .probe = tpm_tis_i2c_probe, |
| 711 | .remove = tpm_tis_i2c_remove, |
| 712 | .driver = { |
| 713 | .name = "tpm_i2c_infineon", |
| 714 | .pm = &tpm_tis_i2c_ops, |
| 715 | .of_match_table = of_match_ptr(tpm_tis_i2c_of_match), |
| 716 | }, |
| 717 | }; |
| 718 | |
| 719 | module_i2c_driver(tpm_tis_i2c_driver); |
| 720 | MODULE_AUTHOR("Peter Huewe <peter.huewe@infineon.com>"); |
| 721 | MODULE_DESCRIPTION("TPM TIS I2C Infineon Driver"); |
| 722 | MODULE_VERSION("2.2.0"); |
| 723 | MODULE_LICENSE("GPL"); |