| Kyle Swenson | 8d8f654 | 2021-03-15 11:02:55 -0600 | [diff] [blame^] | 1 | /* |
| 2 | * Definitions for PCDP-defined console devices |
| 3 | * |
| 4 | * For DIG64_HCDPv10a_01.pdf and DIG64_PCDPv20.pdf (v1.0a and v2.0 resp.), |
| 5 | * please see <http://www.dig64.org/specifications/> |
| 6 | * |
| 7 | * (c) Copyright 2002, 2004 Hewlett-Packard Development Company, L.P. |
| 8 | * Khalid Aziz <khalid.aziz@hp.com> |
| 9 | * Bjorn Helgaas <bjorn.helgaas@hp.com> |
| 10 | * |
| 11 | * This program is free software; you can redistribute it and/or modify |
| 12 | * it under the terms of the GNU General Public License version 2 as |
| 13 | * published by the Free Software Foundation. |
| 14 | */ |
| 15 | |
| 16 | #define PCDP_CONSOLE 0 |
| 17 | #define PCDP_DEBUG 1 |
| 18 | #define PCDP_CONSOLE_OUTPUT 2 |
| 19 | #define PCDP_CONSOLE_INPUT 3 |
| 20 | |
| 21 | #define PCDP_UART (0 << 3) |
| 22 | #define PCDP_VGA (1 << 3) |
| 23 | #define PCDP_USB (2 << 3) |
| 24 | |
| 25 | /* pcdp_uart.type and pcdp_device.type */ |
| 26 | #define PCDP_CONSOLE_UART (PCDP_UART | PCDP_CONSOLE) |
| 27 | #define PCDP_DEBUG_UART (PCDP_UART | PCDP_DEBUG) |
| 28 | #define PCDP_CONSOLE_VGA (PCDP_VGA | PCDP_CONSOLE_OUTPUT) |
| 29 | #define PCDP_CONSOLE_USB (PCDP_USB | PCDP_CONSOLE_INPUT) |
| 30 | |
| 31 | /* pcdp_uart.flags */ |
| 32 | #define PCDP_UART_EDGE_SENSITIVE (1 << 0) |
| 33 | #define PCDP_UART_ACTIVE_LOW (1 << 1) |
| 34 | #define PCDP_UART_PRIMARY_CONSOLE (1 << 2) |
| 35 | #define PCDP_UART_IRQ (1 << 6) /* in pci_func for rev < 3 */ |
| 36 | #define PCDP_UART_PCI (1 << 7) /* in pci_func for rev < 3 */ |
| 37 | |
| 38 | struct pcdp_uart { |
| 39 | u8 type; |
| 40 | u8 bits; |
| 41 | u8 parity; |
| 42 | u8 stop_bits; |
| 43 | u8 pci_seg; |
| 44 | u8 pci_bus; |
| 45 | u8 pci_dev; |
| 46 | u8 pci_func; |
| 47 | u64 baud; |
| 48 | struct acpi_generic_address addr; |
| 49 | u16 pci_dev_id; |
| 50 | u16 pci_vendor_id; |
| 51 | u32 gsi; |
| 52 | u32 clock_rate; |
| 53 | u8 pci_prog_intfc; |
| 54 | u8 flags; |
| 55 | u16 conout_index; |
| 56 | u32 reserved; |
| 57 | } __attribute__((packed)); |
| 58 | |
| 59 | #define PCDP_IF_PCI 1 |
| 60 | |
| 61 | /* pcdp_if_pci.trans */ |
| 62 | #define PCDP_PCI_TRANS_IOPORT 0x02 |
| 63 | #define PCDP_PCI_TRANS_MMIO 0x01 |
| 64 | |
| 65 | struct pcdp_if_pci { |
| 66 | u8 interconnect; |
| 67 | u8 reserved; |
| 68 | u16 length; |
| 69 | u8 segment; |
| 70 | u8 bus; |
| 71 | u8 dev; |
| 72 | u8 fun; |
| 73 | u16 dev_id; |
| 74 | u16 vendor_id; |
| 75 | u32 acpi_interrupt; |
| 76 | u64 mmio_tra; |
| 77 | u64 ioport_tra; |
| 78 | u8 flags; |
| 79 | u8 trans; |
| 80 | } __attribute__((packed)); |
| 81 | |
| 82 | struct pcdp_vga { |
| 83 | u8 count; /* address space descriptors */ |
| 84 | } __attribute__((packed)); |
| 85 | |
| 86 | /* pcdp_device.flags */ |
| 87 | #define PCDP_PRIMARY_CONSOLE 1 |
| 88 | |
| 89 | struct pcdp_device { |
| 90 | u8 type; |
| 91 | u8 flags; |
| 92 | u16 length; |
| 93 | u16 efi_index; |
| 94 | /* next data is pcdp_if_pci or pcdp_if_acpi (not yet supported) */ |
| 95 | /* next data is device specific type (currently only pcdp_vga) */ |
| 96 | } __attribute__((packed)); |
| 97 | |
| 98 | struct pcdp { |
| 99 | u8 signature[4]; |
| 100 | u32 length; |
| 101 | u8 rev; /* PCDP v2.0 is rev 3 */ |
| 102 | u8 chksum; |
| 103 | u8 oemid[6]; |
| 104 | u8 oem_tabid[8]; |
| 105 | u32 oem_rev; |
| 106 | u8 creator_id[4]; |
| 107 | u32 creator_rev; |
| 108 | u32 num_uarts; |
| 109 | struct pcdp_uart uart[0]; /* actual size is num_uarts */ |
| 110 | /* remainder of table is pcdp_device structures */ |
| 111 | } __attribute__((packed)); |