Kyle Swenson | 8d8f654 | 2021-03-15 11:02:55 -0600 | [diff] [blame^] | 1 | /* |
| 2 | i2c Support for the Apple `Hydra' Mac I/O |
| 3 | |
| 4 | Copyright (c) 1999-2004 Geert Uytterhoeven <geert@linux-m68k.org> |
| 5 | |
| 6 | Based on i2c Support for Via Technologies 82C586B South Bridge |
| 7 | Copyright (c) 1998, 1999 Kyösti Mälkki <kmalkki@cc.hut.fi> |
| 8 | |
| 9 | This program is free software; you can redistribute it and/or modify |
| 10 | it under the terms of the GNU General Public License as published by |
| 11 | the Free Software Foundation; either version 2 of the License, or |
| 12 | (at your option) any later version. |
| 13 | |
| 14 | This program is distributed in the hope that it will be useful, |
| 15 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | GNU General Public License for more details. |
| 18 | */ |
| 19 | |
| 20 | #include <linux/kernel.h> |
| 21 | #include <linux/module.h> |
| 22 | #include <linux/pci.h> |
| 23 | #include <linux/types.h> |
| 24 | #include <linux/i2c.h> |
| 25 | #include <linux/i2c-algo-bit.h> |
| 26 | #include <linux/io.h> |
| 27 | #include <asm/hydra.h> |
| 28 | |
| 29 | |
| 30 | #define HYDRA_CPD_PD0 0x00000001 /* CachePD lines */ |
| 31 | #define HYDRA_CPD_PD1 0x00000002 |
| 32 | #define HYDRA_CPD_PD2 0x00000004 |
| 33 | #define HYDRA_CPD_PD3 0x00000008 |
| 34 | |
| 35 | #define HYDRA_SCLK HYDRA_CPD_PD0 |
| 36 | #define HYDRA_SDAT HYDRA_CPD_PD1 |
| 37 | #define HYDRA_SCLK_OE 0x00000010 |
| 38 | #define HYDRA_SDAT_OE 0x00000020 |
| 39 | |
| 40 | static inline void pdregw(void *data, u32 val) |
| 41 | { |
| 42 | struct Hydra *hydra = (struct Hydra *)data; |
| 43 | writel(val, &hydra->CachePD); |
| 44 | } |
| 45 | |
| 46 | static inline u32 pdregr(void *data) |
| 47 | { |
| 48 | struct Hydra *hydra = (struct Hydra *)data; |
| 49 | return readl(&hydra->CachePD); |
| 50 | } |
| 51 | |
| 52 | static void hydra_bit_setscl(void *data, int state) |
| 53 | { |
| 54 | u32 val = pdregr(data); |
| 55 | if (state) |
| 56 | val &= ~HYDRA_SCLK_OE; |
| 57 | else { |
| 58 | val &= ~HYDRA_SCLK; |
| 59 | val |= HYDRA_SCLK_OE; |
| 60 | } |
| 61 | pdregw(data, val); |
| 62 | } |
| 63 | |
| 64 | static void hydra_bit_setsda(void *data, int state) |
| 65 | { |
| 66 | u32 val = pdregr(data); |
| 67 | if (state) |
| 68 | val &= ~HYDRA_SDAT_OE; |
| 69 | else { |
| 70 | val &= ~HYDRA_SDAT; |
| 71 | val |= HYDRA_SDAT_OE; |
| 72 | } |
| 73 | pdregw(data, val); |
| 74 | } |
| 75 | |
| 76 | static int hydra_bit_getscl(void *data) |
| 77 | { |
| 78 | return (pdregr(data) & HYDRA_SCLK) != 0; |
| 79 | } |
| 80 | |
| 81 | static int hydra_bit_getsda(void *data) |
| 82 | { |
| 83 | return (pdregr(data) & HYDRA_SDAT) != 0; |
| 84 | } |
| 85 | |
| 86 | /* ------------------------------------------------------------------------ */ |
| 87 | |
| 88 | static struct i2c_algo_bit_data hydra_bit_data = { |
| 89 | .setsda = hydra_bit_setsda, |
| 90 | .setscl = hydra_bit_setscl, |
| 91 | .getsda = hydra_bit_getsda, |
| 92 | .getscl = hydra_bit_getscl, |
| 93 | .udelay = 5, |
| 94 | .timeout = HZ |
| 95 | }; |
| 96 | |
| 97 | static struct i2c_adapter hydra_adap = { |
| 98 | .owner = THIS_MODULE, |
| 99 | .name = "Hydra i2c", |
| 100 | .algo_data = &hydra_bit_data, |
| 101 | }; |
| 102 | |
| 103 | static const struct pci_device_id hydra_ids[] = { |
| 104 | { PCI_DEVICE(PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_HYDRA) }, |
| 105 | { 0, } |
| 106 | }; |
| 107 | |
| 108 | MODULE_DEVICE_TABLE (pci, hydra_ids); |
| 109 | |
| 110 | static int hydra_probe(struct pci_dev *dev, |
| 111 | const struct pci_device_id *id) |
| 112 | { |
| 113 | unsigned long base = pci_resource_start(dev, 0); |
| 114 | int res; |
| 115 | |
| 116 | if (!request_mem_region(base+offsetof(struct Hydra, CachePD), 4, |
| 117 | hydra_adap.name)) |
| 118 | return -EBUSY; |
| 119 | |
| 120 | hydra_bit_data.data = pci_ioremap_bar(dev, 0); |
| 121 | if (hydra_bit_data.data == NULL) { |
| 122 | release_mem_region(base+offsetof(struct Hydra, CachePD), 4); |
| 123 | return -ENODEV; |
| 124 | } |
| 125 | |
| 126 | pdregw(hydra_bit_data.data, 0); /* clear SCLK_OE and SDAT_OE */ |
| 127 | hydra_adap.dev.parent = &dev->dev; |
| 128 | res = i2c_bit_add_bus(&hydra_adap); |
| 129 | if (res < 0) { |
| 130 | iounmap(hydra_bit_data.data); |
| 131 | release_mem_region(base+offsetof(struct Hydra, CachePD), 4); |
| 132 | return res; |
| 133 | } |
| 134 | return 0; |
| 135 | } |
| 136 | |
| 137 | static void hydra_remove(struct pci_dev *dev) |
| 138 | { |
| 139 | pdregw(hydra_bit_data.data, 0); /* clear SCLK_OE and SDAT_OE */ |
| 140 | i2c_del_adapter(&hydra_adap); |
| 141 | iounmap(hydra_bit_data.data); |
| 142 | release_mem_region(pci_resource_start(dev, 0)+ |
| 143 | offsetof(struct Hydra, CachePD), 4); |
| 144 | } |
| 145 | |
| 146 | |
| 147 | static struct pci_driver hydra_driver = { |
| 148 | .name = "hydra_smbus", |
| 149 | .id_table = hydra_ids, |
| 150 | .probe = hydra_probe, |
| 151 | .remove = hydra_remove, |
| 152 | }; |
| 153 | |
| 154 | module_pci_driver(hydra_driver); |
| 155 | |
| 156 | MODULE_AUTHOR("Geert Uytterhoeven <geert@linux-m68k.org>"); |
| 157 | MODULE_DESCRIPTION("i2c for Apple Hydra Mac I/O"); |
| 158 | MODULE_LICENSE("GPL"); |