Kyle Swenson | 8d8f654 | 2021-03-15 11:02:55 -0600 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (c) 2015 Qualcomm Atheros, Inc. |
| 3 | * |
| 4 | * Permission to use, copy, modify, and/or distribute this software for any |
| 5 | * purpose with or without fee is hereby granted, provided that the above |
| 6 | * copyright notice and this permission notice appear in all copies. |
| 7 | * |
| 8 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES |
| 9 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF |
| 10 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR |
| 11 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES |
| 12 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN |
| 13 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF |
| 14 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. |
| 15 | */ |
| 16 | |
| 17 | /* This file has implementation for code swap logic. With code swap feature, |
| 18 | * target can run the fw binary with even smaller IRAM size by using host |
| 19 | * memory to store some of the code segments. |
| 20 | */ |
| 21 | |
| 22 | #include "core.h" |
| 23 | #include "bmi.h" |
| 24 | #include "debug.h" |
| 25 | |
| 26 | static int ath10k_swap_code_seg_fill(struct ath10k *ar, |
| 27 | struct ath10k_swap_code_seg_info *seg_info, |
| 28 | const void *data, size_t data_len) |
| 29 | { |
| 30 | u8 *virt_addr = seg_info->virt_address[0]; |
| 31 | u8 swap_magic[ATH10K_SWAP_CODE_SEG_MAGIC_BYTES_SZ] = {}; |
| 32 | const u8 *fw_data = data; |
| 33 | union ath10k_swap_code_seg_item *swap_item; |
| 34 | u32 length = 0; |
| 35 | u32 payload_len; |
| 36 | u32 total_payload_len = 0; |
| 37 | u32 size_left = data_len; |
| 38 | |
| 39 | /* Parse swap bin and copy the content to host allocated memory. |
| 40 | * The format is Address, length and value. The last 4-bytes is |
| 41 | * target write address. Currently address field is not used. |
| 42 | */ |
| 43 | seg_info->target_addr = -1; |
| 44 | while (size_left >= sizeof(*swap_item)) { |
| 45 | swap_item = (union ath10k_swap_code_seg_item *)fw_data; |
| 46 | payload_len = __le32_to_cpu(swap_item->tlv.length); |
| 47 | if ((payload_len > size_left) || |
| 48 | (payload_len == 0 && |
| 49 | size_left != sizeof(struct ath10k_swap_code_seg_tail))) { |
| 50 | ath10k_err(ar, "refusing to parse invalid tlv length %d\n", |
| 51 | payload_len); |
| 52 | return -EINVAL; |
| 53 | } |
| 54 | |
| 55 | if (payload_len == 0) { |
| 56 | if (memcmp(swap_item->tail.magic_signature, swap_magic, |
| 57 | ATH10K_SWAP_CODE_SEG_MAGIC_BYTES_SZ)) { |
| 58 | ath10k_err(ar, "refusing an invalid swap file\n"); |
| 59 | return -EINVAL; |
| 60 | } |
| 61 | seg_info->target_addr = |
| 62 | __le32_to_cpu(swap_item->tail.bmi_write_addr); |
| 63 | break; |
| 64 | } |
| 65 | |
| 66 | memcpy(virt_addr, swap_item->tlv.data, payload_len); |
| 67 | virt_addr += payload_len; |
| 68 | length = payload_len + sizeof(struct ath10k_swap_code_seg_tlv); |
| 69 | size_left -= length; |
| 70 | fw_data += length; |
| 71 | total_payload_len += payload_len; |
| 72 | } |
| 73 | |
| 74 | if (seg_info->target_addr == -1) { |
| 75 | ath10k_err(ar, "failed to parse invalid swap file\n"); |
| 76 | return -EINVAL; |
| 77 | } |
| 78 | seg_info->seg_hw_info.swap_size = __cpu_to_le32(total_payload_len); |
| 79 | |
| 80 | return 0; |
| 81 | } |
| 82 | |
| 83 | static void |
| 84 | ath10k_swap_code_seg_free(struct ath10k *ar, |
| 85 | struct ath10k_swap_code_seg_info *seg_info) |
| 86 | { |
| 87 | u32 seg_size; |
| 88 | |
| 89 | if (!seg_info) |
| 90 | return; |
| 91 | |
| 92 | if (!seg_info->virt_address[0]) |
| 93 | return; |
| 94 | |
| 95 | seg_size = __le32_to_cpu(seg_info->seg_hw_info.size); |
| 96 | dma_free_coherent(ar->dev, seg_size, seg_info->virt_address[0], |
| 97 | seg_info->paddr[0]); |
| 98 | } |
| 99 | |
| 100 | static struct ath10k_swap_code_seg_info * |
| 101 | ath10k_swap_code_seg_alloc(struct ath10k *ar, size_t swap_bin_len) |
| 102 | { |
| 103 | struct ath10k_swap_code_seg_info *seg_info; |
| 104 | void *virt_addr; |
| 105 | dma_addr_t paddr; |
| 106 | |
| 107 | swap_bin_len = roundup(swap_bin_len, 2); |
| 108 | if (swap_bin_len > ATH10K_SWAP_CODE_SEG_BIN_LEN_MAX) { |
| 109 | ath10k_err(ar, "refusing code swap bin because it is too big %zu > %d\n", |
| 110 | swap_bin_len, ATH10K_SWAP_CODE_SEG_BIN_LEN_MAX); |
| 111 | return NULL; |
| 112 | } |
| 113 | |
| 114 | seg_info = devm_kzalloc(ar->dev, sizeof(*seg_info), GFP_KERNEL); |
| 115 | if (!seg_info) |
| 116 | return NULL; |
| 117 | |
| 118 | virt_addr = dma_alloc_coherent(ar->dev, swap_bin_len, &paddr, |
| 119 | GFP_KERNEL); |
| 120 | if (!virt_addr) { |
| 121 | ath10k_err(ar, "failed to allocate dma coherent memory\n"); |
| 122 | return NULL; |
| 123 | } |
| 124 | |
| 125 | seg_info->seg_hw_info.bus_addr[0] = __cpu_to_le32(paddr); |
| 126 | seg_info->seg_hw_info.size = __cpu_to_le32(swap_bin_len); |
| 127 | seg_info->seg_hw_info.swap_size = __cpu_to_le32(swap_bin_len); |
| 128 | seg_info->seg_hw_info.num_segs = |
| 129 | __cpu_to_le32(ATH10K_SWAP_CODE_SEG_NUM_SUPPORTED); |
| 130 | seg_info->seg_hw_info.size_log2 = __cpu_to_le32(ilog2(swap_bin_len)); |
| 131 | seg_info->virt_address[0] = virt_addr; |
| 132 | seg_info->paddr[0] = paddr; |
| 133 | |
| 134 | return seg_info; |
| 135 | } |
| 136 | |
| 137 | int ath10k_swap_code_seg_configure(struct ath10k *ar, |
| 138 | enum ath10k_swap_code_seg_bin_type type) |
| 139 | { |
| 140 | int ret; |
| 141 | struct ath10k_swap_code_seg_info *seg_info = NULL; |
| 142 | |
| 143 | switch (type) { |
| 144 | case ATH10K_SWAP_CODE_SEG_BIN_TYPE_FW: |
| 145 | if (!ar->swap.firmware_swap_code_seg_info) |
| 146 | return 0; |
| 147 | |
| 148 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot found firmware code swap binary\n"); |
| 149 | seg_info = ar->swap.firmware_swap_code_seg_info; |
| 150 | break; |
| 151 | default: |
| 152 | case ATH10K_SWAP_CODE_SEG_BIN_TYPE_OTP: |
| 153 | case ATH10K_SWAP_CODE_SEG_BIN_TYPE_UTF: |
| 154 | ath10k_warn(ar, "ignoring unknown code swap binary type %d\n", |
| 155 | type); |
| 156 | return 0; |
| 157 | } |
| 158 | |
| 159 | ret = ath10k_bmi_write_memory(ar, seg_info->target_addr, |
| 160 | &seg_info->seg_hw_info, |
| 161 | sizeof(seg_info->seg_hw_info)); |
| 162 | if (ret) { |
| 163 | ath10k_err(ar, "failed to write Code swap segment information (%d)\n", |
| 164 | ret); |
| 165 | return ret; |
| 166 | } |
| 167 | |
| 168 | return 0; |
| 169 | } |
| 170 | |
| 171 | void ath10k_swap_code_seg_release(struct ath10k *ar) |
| 172 | { |
| 173 | ath10k_swap_code_seg_free(ar, ar->swap.firmware_swap_code_seg_info); |
| 174 | ar->swap.firmware_codeswap_data = NULL; |
| 175 | ar->swap.firmware_codeswap_len = 0; |
| 176 | ar->swap.firmware_swap_code_seg_info = NULL; |
| 177 | } |
| 178 | |
| 179 | int ath10k_swap_code_seg_init(struct ath10k *ar) |
| 180 | { |
| 181 | int ret; |
| 182 | struct ath10k_swap_code_seg_info *seg_info; |
| 183 | |
| 184 | if (!ar->swap.firmware_codeswap_len || !ar->swap.firmware_codeswap_data) |
| 185 | return 0; |
| 186 | |
| 187 | seg_info = ath10k_swap_code_seg_alloc(ar, |
| 188 | ar->swap.firmware_codeswap_len); |
| 189 | if (!seg_info) { |
| 190 | ath10k_err(ar, "failed to allocate fw code swap segment\n"); |
| 191 | return -ENOMEM; |
| 192 | } |
| 193 | |
| 194 | ret = ath10k_swap_code_seg_fill(ar, seg_info, |
| 195 | ar->swap.firmware_codeswap_data, |
| 196 | ar->swap.firmware_codeswap_len); |
| 197 | |
| 198 | if (ret) { |
| 199 | ath10k_warn(ar, "failed to initialize fw code swap segment: %d\n", |
| 200 | ret); |
| 201 | ath10k_swap_code_seg_free(ar, seg_info); |
| 202 | return ret; |
| 203 | } |
| 204 | |
| 205 | ar->swap.firmware_swap_code_seg_info = seg_info; |
| 206 | |
| 207 | return 0; |
| 208 | } |