Kyle Swenson | 8d8f654 | 2021-03-15 11:02:55 -0600 | [diff] [blame^] | 1 | /* |
| 2 | Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com> |
| 3 | <http://rt2x00.serialmonkey.com> |
| 4 | |
| 5 | This program is free software; you can redistribute it and/or modify |
| 6 | it under the terms of the GNU General Public License as published by |
| 7 | the Free Software Foundation; either version 2 of the License, or |
| 8 | (at your option) any later version. |
| 9 | |
| 10 | This program is distributed in the hope that it will be useful, |
| 11 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | GNU General Public License for more details. |
| 14 | |
| 15 | You should have received a copy of the GNU General Public License |
| 16 | along with this program; if not, see <http://www.gnu.org/licenses/>. |
| 17 | */ |
| 18 | |
| 19 | /* |
| 20 | Module: rt2500usb |
| 21 | Abstract: rt2500usb device specific routines. |
| 22 | Supported chipsets: RT2570. |
| 23 | */ |
| 24 | |
| 25 | #include <linux/delay.h> |
| 26 | #include <linux/etherdevice.h> |
| 27 | #include <linux/kernel.h> |
| 28 | #include <linux/module.h> |
| 29 | #include <linux/slab.h> |
| 30 | #include <linux/usb.h> |
| 31 | |
| 32 | #include "rt2x00.h" |
| 33 | #include "rt2x00usb.h" |
| 34 | #include "rt2500usb.h" |
| 35 | |
| 36 | /* |
| 37 | * Allow hardware encryption to be disabled. |
| 38 | */ |
| 39 | static bool modparam_nohwcrypt; |
| 40 | module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO); |
| 41 | MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption."); |
| 42 | |
| 43 | /* |
| 44 | * Register access. |
| 45 | * All access to the CSR registers will go through the methods |
| 46 | * rt2500usb_register_read and rt2500usb_register_write. |
| 47 | * BBP and RF register require indirect register access, |
| 48 | * and use the CSR registers BBPCSR and RFCSR to achieve this. |
| 49 | * These indirect registers work with busy bits, |
| 50 | * and we will try maximal REGISTER_USB_BUSY_COUNT times to access |
| 51 | * the register while taking a REGISTER_BUSY_DELAY us delay |
| 52 | * between each attampt. When the busy bit is still set at that time, |
| 53 | * the access attempt is considered to have failed, |
| 54 | * and we will print an error. |
| 55 | * If the csr_mutex is already held then the _lock variants must |
| 56 | * be used instead. |
| 57 | */ |
| 58 | static inline void rt2500usb_register_read(struct rt2x00_dev *rt2x00dev, |
| 59 | const unsigned int offset, |
| 60 | u16 *value) |
| 61 | { |
| 62 | __le16 reg; |
| 63 | rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ, |
| 64 | USB_VENDOR_REQUEST_IN, offset, |
| 65 | ®, sizeof(reg)); |
| 66 | *value = le16_to_cpu(reg); |
| 67 | } |
| 68 | |
| 69 | static inline void rt2500usb_register_read_lock(struct rt2x00_dev *rt2x00dev, |
| 70 | const unsigned int offset, |
| 71 | u16 *value) |
| 72 | { |
| 73 | __le16 reg; |
| 74 | rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_READ, |
| 75 | USB_VENDOR_REQUEST_IN, offset, |
| 76 | ®, sizeof(reg), REGISTER_TIMEOUT); |
| 77 | *value = le16_to_cpu(reg); |
| 78 | } |
| 79 | |
| 80 | static inline void rt2500usb_register_multiread(struct rt2x00_dev *rt2x00dev, |
| 81 | const unsigned int offset, |
| 82 | void *value, const u16 length) |
| 83 | { |
| 84 | rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ, |
| 85 | USB_VENDOR_REQUEST_IN, offset, |
| 86 | value, length); |
| 87 | } |
| 88 | |
| 89 | static inline void rt2500usb_register_write(struct rt2x00_dev *rt2x00dev, |
| 90 | const unsigned int offset, |
| 91 | u16 value) |
| 92 | { |
| 93 | __le16 reg = cpu_to_le16(value); |
| 94 | rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE, |
| 95 | USB_VENDOR_REQUEST_OUT, offset, |
| 96 | ®, sizeof(reg)); |
| 97 | } |
| 98 | |
| 99 | static inline void rt2500usb_register_write_lock(struct rt2x00_dev *rt2x00dev, |
| 100 | const unsigned int offset, |
| 101 | u16 value) |
| 102 | { |
| 103 | __le16 reg = cpu_to_le16(value); |
| 104 | rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_WRITE, |
| 105 | USB_VENDOR_REQUEST_OUT, offset, |
| 106 | ®, sizeof(reg), REGISTER_TIMEOUT); |
| 107 | } |
| 108 | |
| 109 | static inline void rt2500usb_register_multiwrite(struct rt2x00_dev *rt2x00dev, |
| 110 | const unsigned int offset, |
| 111 | void *value, const u16 length) |
| 112 | { |
| 113 | rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE, |
| 114 | USB_VENDOR_REQUEST_OUT, offset, |
| 115 | value, length); |
| 116 | } |
| 117 | |
| 118 | static int rt2500usb_regbusy_read(struct rt2x00_dev *rt2x00dev, |
| 119 | const unsigned int offset, |
| 120 | struct rt2x00_field16 field, |
| 121 | u16 *reg) |
| 122 | { |
| 123 | unsigned int i; |
| 124 | |
| 125 | for (i = 0; i < REGISTER_USB_BUSY_COUNT; i++) { |
| 126 | rt2500usb_register_read_lock(rt2x00dev, offset, reg); |
| 127 | if (!rt2x00_get_field16(*reg, field)) |
| 128 | return 1; |
| 129 | udelay(REGISTER_BUSY_DELAY); |
| 130 | } |
| 131 | |
| 132 | rt2x00_err(rt2x00dev, "Indirect register access failed: offset=0x%.08x, value=0x%.08x\n", |
| 133 | offset, *reg); |
| 134 | *reg = ~0; |
| 135 | |
| 136 | return 0; |
| 137 | } |
| 138 | |
| 139 | #define WAIT_FOR_BBP(__dev, __reg) \ |
| 140 | rt2500usb_regbusy_read((__dev), PHY_CSR8, PHY_CSR8_BUSY, (__reg)) |
| 141 | #define WAIT_FOR_RF(__dev, __reg) \ |
| 142 | rt2500usb_regbusy_read((__dev), PHY_CSR10, PHY_CSR10_RF_BUSY, (__reg)) |
| 143 | |
| 144 | static void rt2500usb_bbp_write(struct rt2x00_dev *rt2x00dev, |
| 145 | const unsigned int word, const u8 value) |
| 146 | { |
| 147 | u16 reg; |
| 148 | |
| 149 | mutex_lock(&rt2x00dev->csr_mutex); |
| 150 | |
| 151 | /* |
| 152 | * Wait until the BBP becomes available, afterwards we |
| 153 | * can safely write the new data into the register. |
| 154 | */ |
| 155 | if (WAIT_FOR_BBP(rt2x00dev, ®)) { |
| 156 | reg = 0; |
| 157 | rt2x00_set_field16(®, PHY_CSR7_DATA, value); |
| 158 | rt2x00_set_field16(®, PHY_CSR7_REG_ID, word); |
| 159 | rt2x00_set_field16(®, PHY_CSR7_READ_CONTROL, 0); |
| 160 | |
| 161 | rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg); |
| 162 | } |
| 163 | |
| 164 | mutex_unlock(&rt2x00dev->csr_mutex); |
| 165 | } |
| 166 | |
| 167 | static void rt2500usb_bbp_read(struct rt2x00_dev *rt2x00dev, |
| 168 | const unsigned int word, u8 *value) |
| 169 | { |
| 170 | u16 reg; |
| 171 | |
| 172 | mutex_lock(&rt2x00dev->csr_mutex); |
| 173 | |
| 174 | /* |
| 175 | * Wait until the BBP becomes available, afterwards we |
| 176 | * can safely write the read request into the register. |
| 177 | * After the data has been written, we wait until hardware |
| 178 | * returns the correct value, if at any time the register |
| 179 | * doesn't become available in time, reg will be 0xffffffff |
| 180 | * which means we return 0xff to the caller. |
| 181 | */ |
| 182 | if (WAIT_FOR_BBP(rt2x00dev, ®)) { |
| 183 | reg = 0; |
| 184 | rt2x00_set_field16(®, PHY_CSR7_REG_ID, word); |
| 185 | rt2x00_set_field16(®, PHY_CSR7_READ_CONTROL, 1); |
| 186 | |
| 187 | rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg); |
| 188 | |
| 189 | if (WAIT_FOR_BBP(rt2x00dev, ®)) |
| 190 | rt2500usb_register_read_lock(rt2x00dev, PHY_CSR7, ®); |
| 191 | } |
| 192 | |
| 193 | *value = rt2x00_get_field16(reg, PHY_CSR7_DATA); |
| 194 | |
| 195 | mutex_unlock(&rt2x00dev->csr_mutex); |
| 196 | } |
| 197 | |
| 198 | static void rt2500usb_rf_write(struct rt2x00_dev *rt2x00dev, |
| 199 | const unsigned int word, const u32 value) |
| 200 | { |
| 201 | u16 reg; |
| 202 | |
| 203 | mutex_lock(&rt2x00dev->csr_mutex); |
| 204 | |
| 205 | /* |
| 206 | * Wait until the RF becomes available, afterwards we |
| 207 | * can safely write the new data into the register. |
| 208 | */ |
| 209 | if (WAIT_FOR_RF(rt2x00dev, ®)) { |
| 210 | reg = 0; |
| 211 | rt2x00_set_field16(®, PHY_CSR9_RF_VALUE, value); |
| 212 | rt2500usb_register_write_lock(rt2x00dev, PHY_CSR9, reg); |
| 213 | |
| 214 | reg = 0; |
| 215 | rt2x00_set_field16(®, PHY_CSR10_RF_VALUE, value >> 16); |
| 216 | rt2x00_set_field16(®, PHY_CSR10_RF_NUMBER_OF_BITS, 20); |
| 217 | rt2x00_set_field16(®, PHY_CSR10_RF_IF_SELECT, 0); |
| 218 | rt2x00_set_field16(®, PHY_CSR10_RF_BUSY, 1); |
| 219 | |
| 220 | rt2500usb_register_write_lock(rt2x00dev, PHY_CSR10, reg); |
| 221 | rt2x00_rf_write(rt2x00dev, word, value); |
| 222 | } |
| 223 | |
| 224 | mutex_unlock(&rt2x00dev->csr_mutex); |
| 225 | } |
| 226 | |
| 227 | #ifdef CONFIG_RT2X00_LIB_DEBUGFS |
| 228 | static void _rt2500usb_register_read(struct rt2x00_dev *rt2x00dev, |
| 229 | const unsigned int offset, |
| 230 | u32 *value) |
| 231 | { |
| 232 | rt2500usb_register_read(rt2x00dev, offset, (u16 *)value); |
| 233 | } |
| 234 | |
| 235 | static void _rt2500usb_register_write(struct rt2x00_dev *rt2x00dev, |
| 236 | const unsigned int offset, |
| 237 | u32 value) |
| 238 | { |
| 239 | rt2500usb_register_write(rt2x00dev, offset, value); |
| 240 | } |
| 241 | |
| 242 | static const struct rt2x00debug rt2500usb_rt2x00debug = { |
| 243 | .owner = THIS_MODULE, |
| 244 | .csr = { |
| 245 | .read = _rt2500usb_register_read, |
| 246 | .write = _rt2500usb_register_write, |
| 247 | .flags = RT2X00DEBUGFS_OFFSET, |
| 248 | .word_base = CSR_REG_BASE, |
| 249 | .word_size = sizeof(u16), |
| 250 | .word_count = CSR_REG_SIZE / sizeof(u16), |
| 251 | }, |
| 252 | .eeprom = { |
| 253 | .read = rt2x00_eeprom_read, |
| 254 | .write = rt2x00_eeprom_write, |
| 255 | .word_base = EEPROM_BASE, |
| 256 | .word_size = sizeof(u16), |
| 257 | .word_count = EEPROM_SIZE / sizeof(u16), |
| 258 | }, |
| 259 | .bbp = { |
| 260 | .read = rt2500usb_bbp_read, |
| 261 | .write = rt2500usb_bbp_write, |
| 262 | .word_base = BBP_BASE, |
| 263 | .word_size = sizeof(u8), |
| 264 | .word_count = BBP_SIZE / sizeof(u8), |
| 265 | }, |
| 266 | .rf = { |
| 267 | .read = rt2x00_rf_read, |
| 268 | .write = rt2500usb_rf_write, |
| 269 | .word_base = RF_BASE, |
| 270 | .word_size = sizeof(u32), |
| 271 | .word_count = RF_SIZE / sizeof(u32), |
| 272 | }, |
| 273 | }; |
| 274 | #endif /* CONFIG_RT2X00_LIB_DEBUGFS */ |
| 275 | |
| 276 | static int rt2500usb_rfkill_poll(struct rt2x00_dev *rt2x00dev) |
| 277 | { |
| 278 | u16 reg; |
| 279 | |
| 280 | rt2500usb_register_read(rt2x00dev, MAC_CSR19, ®); |
| 281 | return rt2x00_get_field16(reg, MAC_CSR19_VAL7); |
| 282 | } |
| 283 | |
| 284 | #ifdef CONFIG_RT2X00_LIB_LEDS |
| 285 | static void rt2500usb_brightness_set(struct led_classdev *led_cdev, |
| 286 | enum led_brightness brightness) |
| 287 | { |
| 288 | struct rt2x00_led *led = |
| 289 | container_of(led_cdev, struct rt2x00_led, led_dev); |
| 290 | unsigned int enabled = brightness != LED_OFF; |
| 291 | u16 reg; |
| 292 | |
| 293 | rt2500usb_register_read(led->rt2x00dev, MAC_CSR20, ®); |
| 294 | |
| 295 | if (led->type == LED_TYPE_RADIO || led->type == LED_TYPE_ASSOC) |
| 296 | rt2x00_set_field16(®, MAC_CSR20_LINK, enabled); |
| 297 | else if (led->type == LED_TYPE_ACTIVITY) |
| 298 | rt2x00_set_field16(®, MAC_CSR20_ACTIVITY, enabled); |
| 299 | |
| 300 | rt2500usb_register_write(led->rt2x00dev, MAC_CSR20, reg); |
| 301 | } |
| 302 | |
| 303 | static int rt2500usb_blink_set(struct led_classdev *led_cdev, |
| 304 | unsigned long *delay_on, |
| 305 | unsigned long *delay_off) |
| 306 | { |
| 307 | struct rt2x00_led *led = |
| 308 | container_of(led_cdev, struct rt2x00_led, led_dev); |
| 309 | u16 reg; |
| 310 | |
| 311 | rt2500usb_register_read(led->rt2x00dev, MAC_CSR21, ®); |
| 312 | rt2x00_set_field16(®, MAC_CSR21_ON_PERIOD, *delay_on); |
| 313 | rt2x00_set_field16(®, MAC_CSR21_OFF_PERIOD, *delay_off); |
| 314 | rt2500usb_register_write(led->rt2x00dev, MAC_CSR21, reg); |
| 315 | |
| 316 | return 0; |
| 317 | } |
| 318 | |
| 319 | static void rt2500usb_init_led(struct rt2x00_dev *rt2x00dev, |
| 320 | struct rt2x00_led *led, |
| 321 | enum led_type type) |
| 322 | { |
| 323 | led->rt2x00dev = rt2x00dev; |
| 324 | led->type = type; |
| 325 | led->led_dev.brightness_set = rt2500usb_brightness_set; |
| 326 | led->led_dev.blink_set = rt2500usb_blink_set; |
| 327 | led->flags = LED_INITIALIZED; |
| 328 | } |
| 329 | #endif /* CONFIG_RT2X00_LIB_LEDS */ |
| 330 | |
| 331 | /* |
| 332 | * Configuration handlers. |
| 333 | */ |
| 334 | |
| 335 | /* |
| 336 | * rt2500usb does not differentiate between shared and pairwise |
| 337 | * keys, so we should use the same function for both key types. |
| 338 | */ |
| 339 | static int rt2500usb_config_key(struct rt2x00_dev *rt2x00dev, |
| 340 | struct rt2x00lib_crypto *crypto, |
| 341 | struct ieee80211_key_conf *key) |
| 342 | { |
| 343 | u32 mask; |
| 344 | u16 reg; |
| 345 | enum cipher curr_cipher; |
| 346 | |
| 347 | if (crypto->cmd == SET_KEY) { |
| 348 | /* |
| 349 | * Disallow to set WEP key other than with index 0, |
| 350 | * it is known that not work at least on some hardware. |
| 351 | * SW crypto will be used in that case. |
| 352 | */ |
| 353 | if ((key->cipher == WLAN_CIPHER_SUITE_WEP40 || |
| 354 | key->cipher == WLAN_CIPHER_SUITE_WEP104) && |
| 355 | key->keyidx != 0) |
| 356 | return -EOPNOTSUPP; |
| 357 | |
| 358 | /* |
| 359 | * Pairwise key will always be entry 0, but this |
| 360 | * could collide with a shared key on the same |
| 361 | * position... |
| 362 | */ |
| 363 | mask = TXRX_CSR0_KEY_ID.bit_mask; |
| 364 | |
| 365 | rt2500usb_register_read(rt2x00dev, TXRX_CSR0, ®); |
| 366 | curr_cipher = rt2x00_get_field16(reg, TXRX_CSR0_ALGORITHM); |
| 367 | reg &= mask; |
| 368 | |
| 369 | if (reg && reg == mask) |
| 370 | return -ENOSPC; |
| 371 | |
| 372 | reg = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID); |
| 373 | |
| 374 | key->hw_key_idx += reg ? ffz(reg) : 0; |
| 375 | /* |
| 376 | * Hardware requires that all keys use the same cipher |
| 377 | * (e.g. TKIP-only, AES-only, but not TKIP+AES). |
| 378 | * If this is not the first key, compare the cipher with the |
| 379 | * first one and fall back to SW crypto if not the same. |
| 380 | */ |
| 381 | if (key->hw_key_idx > 0 && crypto->cipher != curr_cipher) |
| 382 | return -EOPNOTSUPP; |
| 383 | |
| 384 | rt2500usb_register_multiwrite(rt2x00dev, KEY_ENTRY(key->hw_key_idx), |
| 385 | crypto->key, sizeof(crypto->key)); |
| 386 | |
| 387 | /* |
| 388 | * The driver does not support the IV/EIV generation |
| 389 | * in hardware. However it demands the data to be provided |
| 390 | * both separately as well as inside the frame. |
| 391 | * We already provided the CONFIG_CRYPTO_COPY_IV to rt2x00lib |
| 392 | * to ensure rt2x00lib will not strip the data from the |
| 393 | * frame after the copy, now we must tell mac80211 |
| 394 | * to generate the IV/EIV data. |
| 395 | */ |
| 396 | key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV; |
| 397 | key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC; |
| 398 | } |
| 399 | |
| 400 | /* |
| 401 | * TXRX_CSR0_KEY_ID contains only single-bit fields to indicate |
| 402 | * a particular key is valid. |
| 403 | */ |
| 404 | rt2500usb_register_read(rt2x00dev, TXRX_CSR0, ®); |
| 405 | rt2x00_set_field16(®, TXRX_CSR0_ALGORITHM, crypto->cipher); |
| 406 | rt2x00_set_field16(®, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER); |
| 407 | |
| 408 | mask = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID); |
| 409 | if (crypto->cmd == SET_KEY) |
| 410 | mask |= 1 << key->hw_key_idx; |
| 411 | else if (crypto->cmd == DISABLE_KEY) |
| 412 | mask &= ~(1 << key->hw_key_idx); |
| 413 | rt2x00_set_field16(®, TXRX_CSR0_KEY_ID, mask); |
| 414 | rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg); |
| 415 | |
| 416 | return 0; |
| 417 | } |
| 418 | |
| 419 | static void rt2500usb_config_filter(struct rt2x00_dev *rt2x00dev, |
| 420 | const unsigned int filter_flags) |
| 421 | { |
| 422 | u16 reg; |
| 423 | |
| 424 | /* |
| 425 | * Start configuration steps. |
| 426 | * Note that the version error will always be dropped |
| 427 | * and broadcast frames will always be accepted since |
| 428 | * there is no filter for it at this time. |
| 429 | */ |
| 430 | rt2500usb_register_read(rt2x00dev, TXRX_CSR2, ®); |
| 431 | rt2x00_set_field16(®, TXRX_CSR2_DROP_CRC, |
| 432 | !(filter_flags & FIF_FCSFAIL)); |
| 433 | rt2x00_set_field16(®, TXRX_CSR2_DROP_PHYSICAL, |
| 434 | !(filter_flags & FIF_PLCPFAIL)); |
| 435 | rt2x00_set_field16(®, TXRX_CSR2_DROP_CONTROL, |
| 436 | !(filter_flags & FIF_CONTROL)); |
| 437 | rt2x00_set_field16(®, TXRX_CSR2_DROP_NOT_TO_ME, 1); |
| 438 | rt2x00_set_field16(®, TXRX_CSR2_DROP_TODS, |
| 439 | !rt2x00dev->intf_ap_count); |
| 440 | rt2x00_set_field16(®, TXRX_CSR2_DROP_VERSION_ERROR, 1); |
| 441 | rt2x00_set_field16(®, TXRX_CSR2_DROP_MULTICAST, |
| 442 | !(filter_flags & FIF_ALLMULTI)); |
| 443 | rt2x00_set_field16(®, TXRX_CSR2_DROP_BROADCAST, 0); |
| 444 | rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg); |
| 445 | } |
| 446 | |
| 447 | static void rt2500usb_config_intf(struct rt2x00_dev *rt2x00dev, |
| 448 | struct rt2x00_intf *intf, |
| 449 | struct rt2x00intf_conf *conf, |
| 450 | const unsigned int flags) |
| 451 | { |
| 452 | unsigned int bcn_preload; |
| 453 | u16 reg; |
| 454 | |
| 455 | if (flags & CONFIG_UPDATE_TYPE) { |
| 456 | /* |
| 457 | * Enable beacon config |
| 458 | */ |
| 459 | bcn_preload = PREAMBLE + GET_DURATION(IEEE80211_HEADER, 20); |
| 460 | rt2500usb_register_read(rt2x00dev, TXRX_CSR20, ®); |
| 461 | rt2x00_set_field16(®, TXRX_CSR20_OFFSET, bcn_preload >> 6); |
| 462 | rt2x00_set_field16(®, TXRX_CSR20_BCN_EXPECT_WINDOW, |
| 463 | 2 * (conf->type != NL80211_IFTYPE_STATION)); |
| 464 | rt2500usb_register_write(rt2x00dev, TXRX_CSR20, reg); |
| 465 | |
| 466 | /* |
| 467 | * Enable synchronisation. |
| 468 | */ |
| 469 | rt2500usb_register_read(rt2x00dev, TXRX_CSR18, ®); |
| 470 | rt2x00_set_field16(®, TXRX_CSR18_OFFSET, 0); |
| 471 | rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg); |
| 472 | |
| 473 | rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®); |
| 474 | rt2x00_set_field16(®, TXRX_CSR19_TSF_SYNC, conf->sync); |
| 475 | rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); |
| 476 | } |
| 477 | |
| 478 | if (flags & CONFIG_UPDATE_MAC) |
| 479 | rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR2, conf->mac, |
| 480 | (3 * sizeof(__le16))); |
| 481 | |
| 482 | if (flags & CONFIG_UPDATE_BSSID) |
| 483 | rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR5, conf->bssid, |
| 484 | (3 * sizeof(__le16))); |
| 485 | } |
| 486 | |
| 487 | static void rt2500usb_config_erp(struct rt2x00_dev *rt2x00dev, |
| 488 | struct rt2x00lib_erp *erp, |
| 489 | u32 changed) |
| 490 | { |
| 491 | u16 reg; |
| 492 | |
| 493 | if (changed & BSS_CHANGED_ERP_PREAMBLE) { |
| 494 | rt2500usb_register_read(rt2x00dev, TXRX_CSR10, ®); |
| 495 | rt2x00_set_field16(®, TXRX_CSR10_AUTORESPOND_PREAMBLE, |
| 496 | !!erp->short_preamble); |
| 497 | rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg); |
| 498 | } |
| 499 | |
| 500 | if (changed & BSS_CHANGED_BASIC_RATES) |
| 501 | rt2500usb_register_write(rt2x00dev, TXRX_CSR11, |
| 502 | erp->basic_rates); |
| 503 | |
| 504 | if (changed & BSS_CHANGED_BEACON_INT) { |
| 505 | rt2500usb_register_read(rt2x00dev, TXRX_CSR18, ®); |
| 506 | rt2x00_set_field16(®, TXRX_CSR18_INTERVAL, |
| 507 | erp->beacon_int * 4); |
| 508 | rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg); |
| 509 | } |
| 510 | |
| 511 | if (changed & BSS_CHANGED_ERP_SLOT) { |
| 512 | rt2500usb_register_write(rt2x00dev, MAC_CSR10, erp->slot_time); |
| 513 | rt2500usb_register_write(rt2x00dev, MAC_CSR11, erp->sifs); |
| 514 | rt2500usb_register_write(rt2x00dev, MAC_CSR12, erp->eifs); |
| 515 | } |
| 516 | } |
| 517 | |
| 518 | static void rt2500usb_config_ant(struct rt2x00_dev *rt2x00dev, |
| 519 | struct antenna_setup *ant) |
| 520 | { |
| 521 | u8 r2; |
| 522 | u8 r14; |
| 523 | u16 csr5; |
| 524 | u16 csr6; |
| 525 | |
| 526 | /* |
| 527 | * We should never come here because rt2x00lib is supposed |
| 528 | * to catch this and send us the correct antenna explicitely. |
| 529 | */ |
| 530 | BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY || |
| 531 | ant->tx == ANTENNA_SW_DIVERSITY); |
| 532 | |
| 533 | rt2500usb_bbp_read(rt2x00dev, 2, &r2); |
| 534 | rt2500usb_bbp_read(rt2x00dev, 14, &r14); |
| 535 | rt2500usb_register_read(rt2x00dev, PHY_CSR5, &csr5); |
| 536 | rt2500usb_register_read(rt2x00dev, PHY_CSR6, &csr6); |
| 537 | |
| 538 | /* |
| 539 | * Configure the TX antenna. |
| 540 | */ |
| 541 | switch (ant->tx) { |
| 542 | case ANTENNA_HW_DIVERSITY: |
| 543 | rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 1); |
| 544 | rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 1); |
| 545 | rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 1); |
| 546 | break; |
| 547 | case ANTENNA_A: |
| 548 | rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0); |
| 549 | rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 0); |
| 550 | rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 0); |
| 551 | break; |
| 552 | case ANTENNA_B: |
| 553 | default: |
| 554 | rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2); |
| 555 | rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 2); |
| 556 | rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 2); |
| 557 | break; |
| 558 | } |
| 559 | |
| 560 | /* |
| 561 | * Configure the RX antenna. |
| 562 | */ |
| 563 | switch (ant->rx) { |
| 564 | case ANTENNA_HW_DIVERSITY: |
| 565 | rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 1); |
| 566 | break; |
| 567 | case ANTENNA_A: |
| 568 | rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0); |
| 569 | break; |
| 570 | case ANTENNA_B: |
| 571 | default: |
| 572 | rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2); |
| 573 | break; |
| 574 | } |
| 575 | |
| 576 | /* |
| 577 | * RT2525E and RT5222 need to flip TX I/Q |
| 578 | */ |
| 579 | if (rt2x00_rf(rt2x00dev, RF2525E) || rt2x00_rf(rt2x00dev, RF5222)) { |
| 580 | rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1); |
| 581 | rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 1); |
| 582 | rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 1); |
| 583 | |
| 584 | /* |
| 585 | * RT2525E does not need RX I/Q Flip. |
| 586 | */ |
| 587 | if (rt2x00_rf(rt2x00dev, RF2525E)) |
| 588 | rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0); |
| 589 | } else { |
| 590 | rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 0); |
| 591 | rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 0); |
| 592 | } |
| 593 | |
| 594 | rt2500usb_bbp_write(rt2x00dev, 2, r2); |
| 595 | rt2500usb_bbp_write(rt2x00dev, 14, r14); |
| 596 | rt2500usb_register_write(rt2x00dev, PHY_CSR5, csr5); |
| 597 | rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6); |
| 598 | } |
| 599 | |
| 600 | static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev, |
| 601 | struct rf_channel *rf, const int txpower) |
| 602 | { |
| 603 | /* |
| 604 | * Set TXpower. |
| 605 | */ |
| 606 | rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower)); |
| 607 | |
| 608 | /* |
| 609 | * For RT2525E we should first set the channel to half band higher. |
| 610 | */ |
| 611 | if (rt2x00_rf(rt2x00dev, RF2525E)) { |
| 612 | static const u32 vals[] = { |
| 613 | 0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2, |
| 614 | 0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba, |
| 615 | 0x000008ba, 0x000008be, 0x000008b7, 0x00000902, |
| 616 | 0x00000902, 0x00000906 |
| 617 | }; |
| 618 | |
| 619 | rt2500usb_rf_write(rt2x00dev, 2, vals[rf->channel - 1]); |
| 620 | if (rf->rf4) |
| 621 | rt2500usb_rf_write(rt2x00dev, 4, rf->rf4); |
| 622 | } |
| 623 | |
| 624 | rt2500usb_rf_write(rt2x00dev, 1, rf->rf1); |
| 625 | rt2500usb_rf_write(rt2x00dev, 2, rf->rf2); |
| 626 | rt2500usb_rf_write(rt2x00dev, 3, rf->rf3); |
| 627 | if (rf->rf4) |
| 628 | rt2500usb_rf_write(rt2x00dev, 4, rf->rf4); |
| 629 | } |
| 630 | |
| 631 | static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev, |
| 632 | const int txpower) |
| 633 | { |
| 634 | u32 rf3; |
| 635 | |
| 636 | rt2x00_rf_read(rt2x00dev, 3, &rf3); |
| 637 | rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower)); |
| 638 | rt2500usb_rf_write(rt2x00dev, 3, rf3); |
| 639 | } |
| 640 | |
| 641 | static void rt2500usb_config_ps(struct rt2x00_dev *rt2x00dev, |
| 642 | struct rt2x00lib_conf *libconf) |
| 643 | { |
| 644 | enum dev_state state = |
| 645 | (libconf->conf->flags & IEEE80211_CONF_PS) ? |
| 646 | STATE_SLEEP : STATE_AWAKE; |
| 647 | u16 reg; |
| 648 | |
| 649 | if (state == STATE_SLEEP) { |
| 650 | rt2500usb_register_read(rt2x00dev, MAC_CSR18, ®); |
| 651 | rt2x00_set_field16(®, MAC_CSR18_DELAY_AFTER_BEACON, |
| 652 | rt2x00dev->beacon_int - 20); |
| 653 | rt2x00_set_field16(®, MAC_CSR18_BEACONS_BEFORE_WAKEUP, |
| 654 | libconf->conf->listen_interval - 1); |
| 655 | |
| 656 | /* We must first disable autowake before it can be enabled */ |
| 657 | rt2x00_set_field16(®, MAC_CSR18_AUTO_WAKE, 0); |
| 658 | rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg); |
| 659 | |
| 660 | rt2x00_set_field16(®, MAC_CSR18_AUTO_WAKE, 1); |
| 661 | rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg); |
| 662 | } else { |
| 663 | rt2500usb_register_read(rt2x00dev, MAC_CSR18, ®); |
| 664 | rt2x00_set_field16(®, MAC_CSR18_AUTO_WAKE, 0); |
| 665 | rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg); |
| 666 | } |
| 667 | |
| 668 | rt2x00dev->ops->lib->set_device_state(rt2x00dev, state); |
| 669 | } |
| 670 | |
| 671 | static void rt2500usb_config(struct rt2x00_dev *rt2x00dev, |
| 672 | struct rt2x00lib_conf *libconf, |
| 673 | const unsigned int flags) |
| 674 | { |
| 675 | if (flags & IEEE80211_CONF_CHANGE_CHANNEL) |
| 676 | rt2500usb_config_channel(rt2x00dev, &libconf->rf, |
| 677 | libconf->conf->power_level); |
| 678 | if ((flags & IEEE80211_CONF_CHANGE_POWER) && |
| 679 | !(flags & IEEE80211_CONF_CHANGE_CHANNEL)) |
| 680 | rt2500usb_config_txpower(rt2x00dev, |
| 681 | libconf->conf->power_level); |
| 682 | if (flags & IEEE80211_CONF_CHANGE_PS) |
| 683 | rt2500usb_config_ps(rt2x00dev, libconf); |
| 684 | } |
| 685 | |
| 686 | /* |
| 687 | * Link tuning |
| 688 | */ |
| 689 | static void rt2500usb_link_stats(struct rt2x00_dev *rt2x00dev, |
| 690 | struct link_qual *qual) |
| 691 | { |
| 692 | u16 reg; |
| 693 | |
| 694 | /* |
| 695 | * Update FCS error count from register. |
| 696 | */ |
| 697 | rt2500usb_register_read(rt2x00dev, STA_CSR0, ®); |
| 698 | qual->rx_failed = rt2x00_get_field16(reg, STA_CSR0_FCS_ERROR); |
| 699 | |
| 700 | /* |
| 701 | * Update False CCA count from register. |
| 702 | */ |
| 703 | rt2500usb_register_read(rt2x00dev, STA_CSR3, ®); |
| 704 | qual->false_cca = rt2x00_get_field16(reg, STA_CSR3_FALSE_CCA_ERROR); |
| 705 | } |
| 706 | |
| 707 | static void rt2500usb_reset_tuner(struct rt2x00_dev *rt2x00dev, |
| 708 | struct link_qual *qual) |
| 709 | { |
| 710 | u16 eeprom; |
| 711 | u16 value; |
| 712 | |
| 713 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &eeprom); |
| 714 | value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R24_LOW); |
| 715 | rt2500usb_bbp_write(rt2x00dev, 24, value); |
| 716 | |
| 717 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &eeprom); |
| 718 | value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R25_LOW); |
| 719 | rt2500usb_bbp_write(rt2x00dev, 25, value); |
| 720 | |
| 721 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &eeprom); |
| 722 | value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R61_LOW); |
| 723 | rt2500usb_bbp_write(rt2x00dev, 61, value); |
| 724 | |
| 725 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &eeprom); |
| 726 | value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_VGCUPPER); |
| 727 | rt2500usb_bbp_write(rt2x00dev, 17, value); |
| 728 | |
| 729 | qual->vgc_level = value; |
| 730 | } |
| 731 | |
| 732 | /* |
| 733 | * Queue handlers. |
| 734 | */ |
| 735 | static void rt2500usb_start_queue(struct data_queue *queue) |
| 736 | { |
| 737 | struct rt2x00_dev *rt2x00dev = queue->rt2x00dev; |
| 738 | u16 reg; |
| 739 | |
| 740 | switch (queue->qid) { |
| 741 | case QID_RX: |
| 742 | rt2500usb_register_read(rt2x00dev, TXRX_CSR2, ®); |
| 743 | rt2x00_set_field16(®, TXRX_CSR2_DISABLE_RX, 0); |
| 744 | rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg); |
| 745 | break; |
| 746 | case QID_BEACON: |
| 747 | rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®); |
| 748 | rt2x00_set_field16(®, TXRX_CSR19_TSF_COUNT, 1); |
| 749 | rt2x00_set_field16(®, TXRX_CSR19_TBCN, 1); |
| 750 | rt2x00_set_field16(®, TXRX_CSR19_BEACON_GEN, 1); |
| 751 | rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); |
| 752 | break; |
| 753 | default: |
| 754 | break; |
| 755 | } |
| 756 | } |
| 757 | |
| 758 | static void rt2500usb_stop_queue(struct data_queue *queue) |
| 759 | { |
| 760 | struct rt2x00_dev *rt2x00dev = queue->rt2x00dev; |
| 761 | u16 reg; |
| 762 | |
| 763 | switch (queue->qid) { |
| 764 | case QID_RX: |
| 765 | rt2500usb_register_read(rt2x00dev, TXRX_CSR2, ®); |
| 766 | rt2x00_set_field16(®, TXRX_CSR2_DISABLE_RX, 1); |
| 767 | rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg); |
| 768 | break; |
| 769 | case QID_BEACON: |
| 770 | rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®); |
| 771 | rt2x00_set_field16(®, TXRX_CSR19_TSF_COUNT, 0); |
| 772 | rt2x00_set_field16(®, TXRX_CSR19_TBCN, 0); |
| 773 | rt2x00_set_field16(®, TXRX_CSR19_BEACON_GEN, 0); |
| 774 | rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); |
| 775 | break; |
| 776 | default: |
| 777 | break; |
| 778 | } |
| 779 | } |
| 780 | |
| 781 | /* |
| 782 | * Initialization functions. |
| 783 | */ |
| 784 | static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev) |
| 785 | { |
| 786 | u16 reg; |
| 787 | |
| 788 | rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0x0001, |
| 789 | USB_MODE_TEST, REGISTER_TIMEOUT); |
| 790 | rt2x00usb_vendor_request_sw(rt2x00dev, USB_SINGLE_WRITE, 0x0308, |
| 791 | 0x00f0, REGISTER_TIMEOUT); |
| 792 | |
| 793 | rt2500usb_register_read(rt2x00dev, TXRX_CSR2, ®); |
| 794 | rt2x00_set_field16(®, TXRX_CSR2_DISABLE_RX, 1); |
| 795 | rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg); |
| 796 | |
| 797 | rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x1111); |
| 798 | rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x1e11); |
| 799 | |
| 800 | rt2500usb_register_read(rt2x00dev, MAC_CSR1, ®); |
| 801 | rt2x00_set_field16(®, MAC_CSR1_SOFT_RESET, 1); |
| 802 | rt2x00_set_field16(®, MAC_CSR1_BBP_RESET, 1); |
| 803 | rt2x00_set_field16(®, MAC_CSR1_HOST_READY, 0); |
| 804 | rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg); |
| 805 | |
| 806 | rt2500usb_register_read(rt2x00dev, MAC_CSR1, ®); |
| 807 | rt2x00_set_field16(®, MAC_CSR1_SOFT_RESET, 0); |
| 808 | rt2x00_set_field16(®, MAC_CSR1_BBP_RESET, 0); |
| 809 | rt2x00_set_field16(®, MAC_CSR1_HOST_READY, 0); |
| 810 | rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg); |
| 811 | |
| 812 | rt2500usb_register_read(rt2x00dev, TXRX_CSR5, ®); |
| 813 | rt2x00_set_field16(®, TXRX_CSR5_BBP_ID0, 13); |
| 814 | rt2x00_set_field16(®, TXRX_CSR5_BBP_ID0_VALID, 1); |
| 815 | rt2x00_set_field16(®, TXRX_CSR5_BBP_ID1, 12); |
| 816 | rt2x00_set_field16(®, TXRX_CSR5_BBP_ID1_VALID, 1); |
| 817 | rt2500usb_register_write(rt2x00dev, TXRX_CSR5, reg); |
| 818 | |
| 819 | rt2500usb_register_read(rt2x00dev, TXRX_CSR6, ®); |
| 820 | rt2x00_set_field16(®, TXRX_CSR6_BBP_ID0, 10); |
| 821 | rt2x00_set_field16(®, TXRX_CSR6_BBP_ID0_VALID, 1); |
| 822 | rt2x00_set_field16(®, TXRX_CSR6_BBP_ID1, 11); |
| 823 | rt2x00_set_field16(®, TXRX_CSR6_BBP_ID1_VALID, 1); |
| 824 | rt2500usb_register_write(rt2x00dev, TXRX_CSR6, reg); |
| 825 | |
| 826 | rt2500usb_register_read(rt2x00dev, TXRX_CSR7, ®); |
| 827 | rt2x00_set_field16(®, TXRX_CSR7_BBP_ID0, 7); |
| 828 | rt2x00_set_field16(®, TXRX_CSR7_BBP_ID0_VALID, 1); |
| 829 | rt2x00_set_field16(®, TXRX_CSR7_BBP_ID1, 6); |
| 830 | rt2x00_set_field16(®, TXRX_CSR7_BBP_ID1_VALID, 1); |
| 831 | rt2500usb_register_write(rt2x00dev, TXRX_CSR7, reg); |
| 832 | |
| 833 | rt2500usb_register_read(rt2x00dev, TXRX_CSR8, ®); |
| 834 | rt2x00_set_field16(®, TXRX_CSR8_BBP_ID0, 5); |
| 835 | rt2x00_set_field16(®, TXRX_CSR8_BBP_ID0_VALID, 1); |
| 836 | rt2x00_set_field16(®, TXRX_CSR8_BBP_ID1, 0); |
| 837 | rt2x00_set_field16(®, TXRX_CSR8_BBP_ID1_VALID, 0); |
| 838 | rt2500usb_register_write(rt2x00dev, TXRX_CSR8, reg); |
| 839 | |
| 840 | rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®); |
| 841 | rt2x00_set_field16(®, TXRX_CSR19_TSF_COUNT, 0); |
| 842 | rt2x00_set_field16(®, TXRX_CSR19_TSF_SYNC, 0); |
| 843 | rt2x00_set_field16(®, TXRX_CSR19_TBCN, 0); |
| 844 | rt2x00_set_field16(®, TXRX_CSR19_BEACON_GEN, 0); |
| 845 | rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); |
| 846 | |
| 847 | rt2500usb_register_write(rt2x00dev, TXRX_CSR21, 0xe78f); |
| 848 | rt2500usb_register_write(rt2x00dev, MAC_CSR9, 0xff1d); |
| 849 | |
| 850 | if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE)) |
| 851 | return -EBUSY; |
| 852 | |
| 853 | rt2500usb_register_read(rt2x00dev, MAC_CSR1, ®); |
| 854 | rt2x00_set_field16(®, MAC_CSR1_SOFT_RESET, 0); |
| 855 | rt2x00_set_field16(®, MAC_CSR1_BBP_RESET, 0); |
| 856 | rt2x00_set_field16(®, MAC_CSR1_HOST_READY, 1); |
| 857 | rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg); |
| 858 | |
| 859 | if (rt2x00_rev(rt2x00dev) >= RT2570_VERSION_C) { |
| 860 | rt2500usb_register_read(rt2x00dev, PHY_CSR2, ®); |
| 861 | rt2x00_set_field16(®, PHY_CSR2_LNA, 0); |
| 862 | } else { |
| 863 | reg = 0; |
| 864 | rt2x00_set_field16(®, PHY_CSR2_LNA, 1); |
| 865 | rt2x00_set_field16(®, PHY_CSR2_LNA_MODE, 3); |
| 866 | } |
| 867 | rt2500usb_register_write(rt2x00dev, PHY_CSR2, reg); |
| 868 | |
| 869 | rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0002); |
| 870 | rt2500usb_register_write(rt2x00dev, MAC_CSR22, 0x0053); |
| 871 | rt2500usb_register_write(rt2x00dev, MAC_CSR15, 0x01ee); |
| 872 | rt2500usb_register_write(rt2x00dev, MAC_CSR16, 0x0000); |
| 873 | |
| 874 | rt2500usb_register_read(rt2x00dev, MAC_CSR8, ®); |
| 875 | rt2x00_set_field16(®, MAC_CSR8_MAX_FRAME_UNIT, |
| 876 | rt2x00dev->rx->data_size); |
| 877 | rt2500usb_register_write(rt2x00dev, MAC_CSR8, reg); |
| 878 | |
| 879 | rt2500usb_register_read(rt2x00dev, TXRX_CSR0, ®); |
| 880 | rt2x00_set_field16(®, TXRX_CSR0_ALGORITHM, CIPHER_NONE); |
| 881 | rt2x00_set_field16(®, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER); |
| 882 | rt2x00_set_field16(®, TXRX_CSR0_KEY_ID, 0); |
| 883 | rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg); |
| 884 | |
| 885 | rt2500usb_register_read(rt2x00dev, MAC_CSR18, ®); |
| 886 | rt2x00_set_field16(®, MAC_CSR18_DELAY_AFTER_BEACON, 90); |
| 887 | rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg); |
| 888 | |
| 889 | rt2500usb_register_read(rt2x00dev, PHY_CSR4, ®); |
| 890 | rt2x00_set_field16(®, PHY_CSR4_LOW_RF_LE, 1); |
| 891 | rt2500usb_register_write(rt2x00dev, PHY_CSR4, reg); |
| 892 | |
| 893 | rt2500usb_register_read(rt2x00dev, TXRX_CSR1, ®); |
| 894 | rt2x00_set_field16(®, TXRX_CSR1_AUTO_SEQUENCE, 1); |
| 895 | rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg); |
| 896 | |
| 897 | return 0; |
| 898 | } |
| 899 | |
| 900 | static int rt2500usb_wait_bbp_ready(struct rt2x00_dev *rt2x00dev) |
| 901 | { |
| 902 | unsigned int i; |
| 903 | u8 value; |
| 904 | |
| 905 | for (i = 0; i < REGISTER_USB_BUSY_COUNT; i++) { |
| 906 | rt2500usb_bbp_read(rt2x00dev, 0, &value); |
| 907 | if ((value != 0xff) && (value != 0x00)) |
| 908 | return 0; |
| 909 | udelay(REGISTER_BUSY_DELAY); |
| 910 | } |
| 911 | |
| 912 | rt2x00_err(rt2x00dev, "BBP register access failed, aborting\n"); |
| 913 | return -EACCES; |
| 914 | } |
| 915 | |
| 916 | static int rt2500usb_init_bbp(struct rt2x00_dev *rt2x00dev) |
| 917 | { |
| 918 | unsigned int i; |
| 919 | u16 eeprom; |
| 920 | u8 value; |
| 921 | u8 reg_id; |
| 922 | |
| 923 | if (unlikely(rt2500usb_wait_bbp_ready(rt2x00dev))) |
| 924 | return -EACCES; |
| 925 | |
| 926 | rt2500usb_bbp_write(rt2x00dev, 3, 0x02); |
| 927 | rt2500usb_bbp_write(rt2x00dev, 4, 0x19); |
| 928 | rt2500usb_bbp_write(rt2x00dev, 14, 0x1c); |
| 929 | rt2500usb_bbp_write(rt2x00dev, 15, 0x30); |
| 930 | rt2500usb_bbp_write(rt2x00dev, 16, 0xac); |
| 931 | rt2500usb_bbp_write(rt2x00dev, 18, 0x18); |
| 932 | rt2500usb_bbp_write(rt2x00dev, 19, 0xff); |
| 933 | rt2500usb_bbp_write(rt2x00dev, 20, 0x1e); |
| 934 | rt2500usb_bbp_write(rt2x00dev, 21, 0x08); |
| 935 | rt2500usb_bbp_write(rt2x00dev, 22, 0x08); |
| 936 | rt2500usb_bbp_write(rt2x00dev, 23, 0x08); |
| 937 | rt2500usb_bbp_write(rt2x00dev, 24, 0x80); |
| 938 | rt2500usb_bbp_write(rt2x00dev, 25, 0x50); |
| 939 | rt2500usb_bbp_write(rt2x00dev, 26, 0x08); |
| 940 | rt2500usb_bbp_write(rt2x00dev, 27, 0x23); |
| 941 | rt2500usb_bbp_write(rt2x00dev, 30, 0x10); |
| 942 | rt2500usb_bbp_write(rt2x00dev, 31, 0x2b); |
| 943 | rt2500usb_bbp_write(rt2x00dev, 32, 0xb9); |
| 944 | rt2500usb_bbp_write(rt2x00dev, 34, 0x12); |
| 945 | rt2500usb_bbp_write(rt2x00dev, 35, 0x50); |
| 946 | rt2500usb_bbp_write(rt2x00dev, 39, 0xc4); |
| 947 | rt2500usb_bbp_write(rt2x00dev, 40, 0x02); |
| 948 | rt2500usb_bbp_write(rt2x00dev, 41, 0x60); |
| 949 | rt2500usb_bbp_write(rt2x00dev, 53, 0x10); |
| 950 | rt2500usb_bbp_write(rt2x00dev, 54, 0x18); |
| 951 | rt2500usb_bbp_write(rt2x00dev, 56, 0x08); |
| 952 | rt2500usb_bbp_write(rt2x00dev, 57, 0x10); |
| 953 | rt2500usb_bbp_write(rt2x00dev, 58, 0x08); |
| 954 | rt2500usb_bbp_write(rt2x00dev, 61, 0x60); |
| 955 | rt2500usb_bbp_write(rt2x00dev, 62, 0x10); |
| 956 | rt2500usb_bbp_write(rt2x00dev, 75, 0xff); |
| 957 | |
| 958 | for (i = 0; i < EEPROM_BBP_SIZE; i++) { |
| 959 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom); |
| 960 | |
| 961 | if (eeprom != 0xffff && eeprom != 0x0000) { |
| 962 | reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID); |
| 963 | value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE); |
| 964 | rt2500usb_bbp_write(rt2x00dev, reg_id, value); |
| 965 | } |
| 966 | } |
| 967 | |
| 968 | return 0; |
| 969 | } |
| 970 | |
| 971 | /* |
| 972 | * Device state switch handlers. |
| 973 | */ |
| 974 | static int rt2500usb_enable_radio(struct rt2x00_dev *rt2x00dev) |
| 975 | { |
| 976 | /* |
| 977 | * Initialize all registers. |
| 978 | */ |
| 979 | if (unlikely(rt2500usb_init_registers(rt2x00dev) || |
| 980 | rt2500usb_init_bbp(rt2x00dev))) |
| 981 | return -EIO; |
| 982 | |
| 983 | return 0; |
| 984 | } |
| 985 | |
| 986 | static void rt2500usb_disable_radio(struct rt2x00_dev *rt2x00dev) |
| 987 | { |
| 988 | rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x2121); |
| 989 | rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x2121); |
| 990 | |
| 991 | /* |
| 992 | * Disable synchronisation. |
| 993 | */ |
| 994 | rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0); |
| 995 | |
| 996 | rt2x00usb_disable_radio(rt2x00dev); |
| 997 | } |
| 998 | |
| 999 | static int rt2500usb_set_state(struct rt2x00_dev *rt2x00dev, |
| 1000 | enum dev_state state) |
| 1001 | { |
| 1002 | u16 reg; |
| 1003 | u16 reg2; |
| 1004 | unsigned int i; |
| 1005 | char put_to_sleep; |
| 1006 | char bbp_state; |
| 1007 | char rf_state; |
| 1008 | |
| 1009 | put_to_sleep = (state != STATE_AWAKE); |
| 1010 | |
| 1011 | reg = 0; |
| 1012 | rt2x00_set_field16(®, MAC_CSR17_BBP_DESIRE_STATE, state); |
| 1013 | rt2x00_set_field16(®, MAC_CSR17_RF_DESIRE_STATE, state); |
| 1014 | rt2x00_set_field16(®, MAC_CSR17_PUT_TO_SLEEP, put_to_sleep); |
| 1015 | rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg); |
| 1016 | rt2x00_set_field16(®, MAC_CSR17_SET_STATE, 1); |
| 1017 | rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg); |
| 1018 | |
| 1019 | /* |
| 1020 | * Device is not guaranteed to be in the requested state yet. |
| 1021 | * We must wait until the register indicates that the |
| 1022 | * device has entered the correct state. |
| 1023 | */ |
| 1024 | for (i = 0; i < REGISTER_USB_BUSY_COUNT; i++) { |
| 1025 | rt2500usb_register_read(rt2x00dev, MAC_CSR17, ®2); |
| 1026 | bbp_state = rt2x00_get_field16(reg2, MAC_CSR17_BBP_CURR_STATE); |
| 1027 | rf_state = rt2x00_get_field16(reg2, MAC_CSR17_RF_CURR_STATE); |
| 1028 | if (bbp_state == state && rf_state == state) |
| 1029 | return 0; |
| 1030 | rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg); |
| 1031 | msleep(30); |
| 1032 | } |
| 1033 | |
| 1034 | return -EBUSY; |
| 1035 | } |
| 1036 | |
| 1037 | static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev, |
| 1038 | enum dev_state state) |
| 1039 | { |
| 1040 | int retval = 0; |
| 1041 | |
| 1042 | switch (state) { |
| 1043 | case STATE_RADIO_ON: |
| 1044 | retval = rt2500usb_enable_radio(rt2x00dev); |
| 1045 | break; |
| 1046 | case STATE_RADIO_OFF: |
| 1047 | rt2500usb_disable_radio(rt2x00dev); |
| 1048 | break; |
| 1049 | case STATE_RADIO_IRQ_ON: |
| 1050 | case STATE_RADIO_IRQ_OFF: |
| 1051 | /* No support, but no error either */ |
| 1052 | break; |
| 1053 | case STATE_DEEP_SLEEP: |
| 1054 | case STATE_SLEEP: |
| 1055 | case STATE_STANDBY: |
| 1056 | case STATE_AWAKE: |
| 1057 | retval = rt2500usb_set_state(rt2x00dev, state); |
| 1058 | break; |
| 1059 | default: |
| 1060 | retval = -ENOTSUPP; |
| 1061 | break; |
| 1062 | } |
| 1063 | |
| 1064 | if (unlikely(retval)) |
| 1065 | rt2x00_err(rt2x00dev, "Device failed to enter state %d (%d)\n", |
| 1066 | state, retval); |
| 1067 | |
| 1068 | return retval; |
| 1069 | } |
| 1070 | |
| 1071 | /* |
| 1072 | * TX descriptor initialization |
| 1073 | */ |
| 1074 | static void rt2500usb_write_tx_desc(struct queue_entry *entry, |
| 1075 | struct txentry_desc *txdesc) |
| 1076 | { |
| 1077 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb); |
| 1078 | __le32 *txd = (__le32 *) entry->skb->data; |
| 1079 | u32 word; |
| 1080 | |
| 1081 | /* |
| 1082 | * Start writing the descriptor words. |
| 1083 | */ |
| 1084 | rt2x00_desc_read(txd, 0, &word); |
| 1085 | rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, txdesc->retry_limit); |
| 1086 | rt2x00_set_field32(&word, TXD_W0_MORE_FRAG, |
| 1087 | test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags)); |
| 1088 | rt2x00_set_field32(&word, TXD_W0_ACK, |
| 1089 | test_bit(ENTRY_TXD_ACK, &txdesc->flags)); |
| 1090 | rt2x00_set_field32(&word, TXD_W0_TIMESTAMP, |
| 1091 | test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags)); |
| 1092 | rt2x00_set_field32(&word, TXD_W0_OFDM, |
| 1093 | (txdesc->rate_mode == RATE_MODE_OFDM)); |
| 1094 | rt2x00_set_field32(&word, TXD_W0_NEW_SEQ, |
| 1095 | test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags)); |
| 1096 | rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->u.plcp.ifs); |
| 1097 | rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, txdesc->length); |
| 1098 | rt2x00_set_field32(&word, TXD_W0_CIPHER, !!txdesc->cipher); |
| 1099 | rt2x00_set_field32(&word, TXD_W0_KEY_ID, txdesc->key_idx); |
| 1100 | rt2x00_desc_write(txd, 0, word); |
| 1101 | |
| 1102 | rt2x00_desc_read(txd, 1, &word); |
| 1103 | rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, txdesc->iv_offset); |
| 1104 | rt2x00_set_field32(&word, TXD_W1_AIFS, entry->queue->aifs); |
| 1105 | rt2x00_set_field32(&word, TXD_W1_CWMIN, entry->queue->cw_min); |
| 1106 | rt2x00_set_field32(&word, TXD_W1_CWMAX, entry->queue->cw_max); |
| 1107 | rt2x00_desc_write(txd, 1, word); |
| 1108 | |
| 1109 | rt2x00_desc_read(txd, 2, &word); |
| 1110 | rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->u.plcp.signal); |
| 1111 | rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->u.plcp.service); |
| 1112 | rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, |
| 1113 | txdesc->u.plcp.length_low); |
| 1114 | rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, |
| 1115 | txdesc->u.plcp.length_high); |
| 1116 | rt2x00_desc_write(txd, 2, word); |
| 1117 | |
| 1118 | if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags)) { |
| 1119 | _rt2x00_desc_write(txd, 3, skbdesc->iv[0]); |
| 1120 | _rt2x00_desc_write(txd, 4, skbdesc->iv[1]); |
| 1121 | } |
| 1122 | |
| 1123 | /* |
| 1124 | * Register descriptor details in skb frame descriptor. |
| 1125 | */ |
| 1126 | skbdesc->flags |= SKBDESC_DESC_IN_SKB; |
| 1127 | skbdesc->desc = txd; |
| 1128 | skbdesc->desc_len = TXD_DESC_SIZE; |
| 1129 | } |
| 1130 | |
| 1131 | /* |
| 1132 | * TX data initialization |
| 1133 | */ |
| 1134 | static void rt2500usb_beacondone(struct urb *urb); |
| 1135 | |
| 1136 | static void rt2500usb_write_beacon(struct queue_entry *entry, |
| 1137 | struct txentry_desc *txdesc) |
| 1138 | { |
| 1139 | struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; |
| 1140 | struct usb_device *usb_dev = to_usb_device_intf(rt2x00dev->dev); |
| 1141 | struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data; |
| 1142 | int pipe = usb_sndbulkpipe(usb_dev, entry->queue->usb_endpoint); |
| 1143 | int length; |
| 1144 | u16 reg, reg0; |
| 1145 | |
| 1146 | /* |
| 1147 | * Disable beaconing while we are reloading the beacon data, |
| 1148 | * otherwise we might be sending out invalid data. |
| 1149 | */ |
| 1150 | rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®); |
| 1151 | rt2x00_set_field16(®, TXRX_CSR19_BEACON_GEN, 0); |
| 1152 | rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); |
| 1153 | |
| 1154 | /* |
| 1155 | * Add space for the descriptor in front of the skb. |
| 1156 | */ |
| 1157 | skb_push(entry->skb, TXD_DESC_SIZE); |
| 1158 | memset(entry->skb->data, 0, TXD_DESC_SIZE); |
| 1159 | |
| 1160 | /* |
| 1161 | * Write the TX descriptor for the beacon. |
| 1162 | */ |
| 1163 | rt2500usb_write_tx_desc(entry, txdesc); |
| 1164 | |
| 1165 | /* |
| 1166 | * Dump beacon to userspace through debugfs. |
| 1167 | */ |
| 1168 | rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_BEACON, entry->skb); |
| 1169 | |
| 1170 | /* |
| 1171 | * USB devices cannot blindly pass the skb->len as the |
| 1172 | * length of the data to usb_fill_bulk_urb. Pass the skb |
| 1173 | * to the driver to determine what the length should be. |
| 1174 | */ |
| 1175 | length = rt2x00dev->ops->lib->get_tx_data_len(entry); |
| 1176 | |
| 1177 | usb_fill_bulk_urb(bcn_priv->urb, usb_dev, pipe, |
| 1178 | entry->skb->data, length, rt2500usb_beacondone, |
| 1179 | entry); |
| 1180 | |
| 1181 | /* |
| 1182 | * Second we need to create the guardian byte. |
| 1183 | * We only need a single byte, so lets recycle |
| 1184 | * the 'flags' field we are not using for beacons. |
| 1185 | */ |
| 1186 | bcn_priv->guardian_data = 0; |
| 1187 | usb_fill_bulk_urb(bcn_priv->guardian_urb, usb_dev, pipe, |
| 1188 | &bcn_priv->guardian_data, 1, rt2500usb_beacondone, |
| 1189 | entry); |
| 1190 | |
| 1191 | /* |
| 1192 | * Send out the guardian byte. |
| 1193 | */ |
| 1194 | usb_submit_urb(bcn_priv->guardian_urb, GFP_ATOMIC); |
| 1195 | |
| 1196 | /* |
| 1197 | * Enable beaconing again. |
| 1198 | */ |
| 1199 | rt2x00_set_field16(®, TXRX_CSR19_TSF_COUNT, 1); |
| 1200 | rt2x00_set_field16(®, TXRX_CSR19_TBCN, 1); |
| 1201 | reg0 = reg; |
| 1202 | rt2x00_set_field16(®, TXRX_CSR19_BEACON_GEN, 1); |
| 1203 | /* |
| 1204 | * Beacon generation will fail initially. |
| 1205 | * To prevent this we need to change the TXRX_CSR19 |
| 1206 | * register several times (reg0 is the same as reg |
| 1207 | * except for TXRX_CSR19_BEACON_GEN, which is 0 in reg0 |
| 1208 | * and 1 in reg). |
| 1209 | */ |
| 1210 | rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); |
| 1211 | rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg0); |
| 1212 | rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); |
| 1213 | rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg0); |
| 1214 | rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); |
| 1215 | } |
| 1216 | |
| 1217 | static int rt2500usb_get_tx_data_len(struct queue_entry *entry) |
| 1218 | { |
| 1219 | int length; |
| 1220 | |
| 1221 | /* |
| 1222 | * The length _must_ be a multiple of 2, |
| 1223 | * but it must _not_ be a multiple of the USB packet size. |
| 1224 | */ |
| 1225 | length = roundup(entry->skb->len, 2); |
| 1226 | length += (2 * !(length % entry->queue->usb_maxpacket)); |
| 1227 | |
| 1228 | return length; |
| 1229 | } |
| 1230 | |
| 1231 | /* |
| 1232 | * RX control handlers |
| 1233 | */ |
| 1234 | static void rt2500usb_fill_rxdone(struct queue_entry *entry, |
| 1235 | struct rxdone_entry_desc *rxdesc) |
| 1236 | { |
| 1237 | struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; |
| 1238 | struct queue_entry_priv_usb *entry_priv = entry->priv_data; |
| 1239 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb); |
| 1240 | __le32 *rxd = |
| 1241 | (__le32 *)(entry->skb->data + |
| 1242 | (entry_priv->urb->actual_length - |
| 1243 | entry->queue->desc_size)); |
| 1244 | u32 word0; |
| 1245 | u32 word1; |
| 1246 | |
| 1247 | /* |
| 1248 | * Copy descriptor to the skbdesc->desc buffer, making it safe from moving of |
| 1249 | * frame data in rt2x00usb. |
| 1250 | */ |
| 1251 | memcpy(skbdesc->desc, rxd, skbdesc->desc_len); |
| 1252 | rxd = (__le32 *)skbdesc->desc; |
| 1253 | |
| 1254 | /* |
| 1255 | * It is now safe to read the descriptor on all architectures. |
| 1256 | */ |
| 1257 | rt2x00_desc_read(rxd, 0, &word0); |
| 1258 | rt2x00_desc_read(rxd, 1, &word1); |
| 1259 | |
| 1260 | if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR)) |
| 1261 | rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC; |
| 1262 | if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR)) |
| 1263 | rxdesc->flags |= RX_FLAG_FAILED_PLCP_CRC; |
| 1264 | |
| 1265 | rxdesc->cipher = rt2x00_get_field32(word0, RXD_W0_CIPHER); |
| 1266 | if (rt2x00_get_field32(word0, RXD_W0_CIPHER_ERROR)) |
| 1267 | rxdesc->cipher_status = RX_CRYPTO_FAIL_KEY; |
| 1268 | |
| 1269 | if (rxdesc->cipher != CIPHER_NONE) { |
| 1270 | _rt2x00_desc_read(rxd, 2, &rxdesc->iv[0]); |
| 1271 | _rt2x00_desc_read(rxd, 3, &rxdesc->iv[1]); |
| 1272 | rxdesc->dev_flags |= RXDONE_CRYPTO_IV; |
| 1273 | |
| 1274 | /* ICV is located at the end of frame */ |
| 1275 | |
| 1276 | rxdesc->flags |= RX_FLAG_MMIC_STRIPPED; |
| 1277 | if (rxdesc->cipher_status == RX_CRYPTO_SUCCESS) |
| 1278 | rxdesc->flags |= RX_FLAG_DECRYPTED; |
| 1279 | else if (rxdesc->cipher_status == RX_CRYPTO_FAIL_MIC) |
| 1280 | rxdesc->flags |= RX_FLAG_MMIC_ERROR; |
| 1281 | } |
| 1282 | |
| 1283 | /* |
| 1284 | * Obtain the status about this packet. |
| 1285 | * When frame was received with an OFDM bitrate, |
| 1286 | * the signal is the PLCP value. If it was received with |
| 1287 | * a CCK bitrate the signal is the rate in 100kbit/s. |
| 1288 | */ |
| 1289 | rxdesc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL); |
| 1290 | rxdesc->rssi = |
| 1291 | rt2x00_get_field32(word1, RXD_W1_RSSI) - rt2x00dev->rssi_offset; |
| 1292 | rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT); |
| 1293 | |
| 1294 | if (rt2x00_get_field32(word0, RXD_W0_OFDM)) |
| 1295 | rxdesc->dev_flags |= RXDONE_SIGNAL_PLCP; |
| 1296 | else |
| 1297 | rxdesc->dev_flags |= RXDONE_SIGNAL_BITRATE; |
| 1298 | if (rt2x00_get_field32(word0, RXD_W0_MY_BSS)) |
| 1299 | rxdesc->dev_flags |= RXDONE_MY_BSS; |
| 1300 | |
| 1301 | /* |
| 1302 | * Adjust the skb memory window to the frame boundaries. |
| 1303 | */ |
| 1304 | skb_trim(entry->skb, rxdesc->size); |
| 1305 | } |
| 1306 | |
| 1307 | /* |
| 1308 | * Interrupt functions. |
| 1309 | */ |
| 1310 | static void rt2500usb_beacondone(struct urb *urb) |
| 1311 | { |
| 1312 | struct queue_entry *entry = (struct queue_entry *)urb->context; |
| 1313 | struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data; |
| 1314 | |
| 1315 | if (!test_bit(DEVICE_STATE_ENABLED_RADIO, &entry->queue->rt2x00dev->flags)) |
| 1316 | return; |
| 1317 | |
| 1318 | /* |
| 1319 | * Check if this was the guardian beacon, |
| 1320 | * if that was the case we need to send the real beacon now. |
| 1321 | * Otherwise we should free the sk_buffer, the device |
| 1322 | * should be doing the rest of the work now. |
| 1323 | */ |
| 1324 | if (bcn_priv->guardian_urb == urb) { |
| 1325 | usb_submit_urb(bcn_priv->urb, GFP_ATOMIC); |
| 1326 | } else if (bcn_priv->urb == urb) { |
| 1327 | dev_kfree_skb(entry->skb); |
| 1328 | entry->skb = NULL; |
| 1329 | } |
| 1330 | } |
| 1331 | |
| 1332 | /* |
| 1333 | * Device probe functions. |
| 1334 | */ |
| 1335 | static int rt2500usb_validate_eeprom(struct rt2x00_dev *rt2x00dev) |
| 1336 | { |
| 1337 | u16 word; |
| 1338 | u8 *mac; |
| 1339 | u8 bbp; |
| 1340 | |
| 1341 | rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE); |
| 1342 | |
| 1343 | /* |
| 1344 | * Start validation of the data that has been read. |
| 1345 | */ |
| 1346 | mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0); |
| 1347 | if (!is_valid_ether_addr(mac)) { |
| 1348 | eth_random_addr(mac); |
| 1349 | rt2x00_eeprom_dbg(rt2x00dev, "MAC: %pM\n", mac); |
| 1350 | } |
| 1351 | |
| 1352 | rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word); |
| 1353 | if (word == 0xffff) { |
| 1354 | rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2); |
| 1355 | rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT, |
| 1356 | ANTENNA_SW_DIVERSITY); |
| 1357 | rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT, |
| 1358 | ANTENNA_SW_DIVERSITY); |
| 1359 | rt2x00_set_field16(&word, EEPROM_ANTENNA_LED_MODE, |
| 1360 | LED_MODE_DEFAULT); |
| 1361 | rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0); |
| 1362 | rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0); |
| 1363 | rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2522); |
| 1364 | rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word); |
| 1365 | rt2x00_eeprom_dbg(rt2x00dev, "Antenna: 0x%04x\n", word); |
| 1366 | } |
| 1367 | |
| 1368 | rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word); |
| 1369 | if (word == 0xffff) { |
| 1370 | rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0); |
| 1371 | rt2x00_set_field16(&word, EEPROM_NIC_DYN_BBP_TUNE, 0); |
| 1372 | rt2x00_set_field16(&word, EEPROM_NIC_CCK_TX_POWER, 0); |
| 1373 | rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word); |
| 1374 | rt2x00_eeprom_dbg(rt2x00dev, "NIC: 0x%04x\n", word); |
| 1375 | } |
| 1376 | |
| 1377 | rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &word); |
| 1378 | if (word == 0xffff) { |
| 1379 | rt2x00_set_field16(&word, EEPROM_CALIBRATE_OFFSET_RSSI, |
| 1380 | DEFAULT_RSSI_OFFSET); |
| 1381 | rt2x00_eeprom_write(rt2x00dev, EEPROM_CALIBRATE_OFFSET, word); |
| 1382 | rt2x00_eeprom_dbg(rt2x00dev, "Calibrate offset: 0x%04x\n", |
| 1383 | word); |
| 1384 | } |
| 1385 | |
| 1386 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &word); |
| 1387 | if (word == 0xffff) { |
| 1388 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_THRESHOLD, 45); |
| 1389 | rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE, word); |
| 1390 | rt2x00_eeprom_dbg(rt2x00dev, "BBPtune: 0x%04x\n", word); |
| 1391 | } |
| 1392 | |
| 1393 | /* |
| 1394 | * Switch lower vgc bound to current BBP R17 value, |
| 1395 | * lower the value a bit for better quality. |
| 1396 | */ |
| 1397 | rt2500usb_bbp_read(rt2x00dev, 17, &bbp); |
| 1398 | bbp -= 6; |
| 1399 | |
| 1400 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &word); |
| 1401 | if (word == 0xffff) { |
| 1402 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCUPPER, 0x40); |
| 1403 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp); |
| 1404 | rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word); |
| 1405 | rt2x00_eeprom_dbg(rt2x00dev, "BBPtune vgc: 0x%04x\n", word); |
| 1406 | } else { |
| 1407 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp); |
| 1408 | rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word); |
| 1409 | } |
| 1410 | |
| 1411 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &word); |
| 1412 | if (word == 0xffff) { |
| 1413 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_LOW, 0x48); |
| 1414 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_HIGH, 0x41); |
| 1415 | rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R17, word); |
| 1416 | rt2x00_eeprom_dbg(rt2x00dev, "BBPtune r17: 0x%04x\n", word); |
| 1417 | } |
| 1418 | |
| 1419 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &word); |
| 1420 | if (word == 0xffff) { |
| 1421 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_LOW, 0x40); |
| 1422 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_HIGH, 0x80); |
| 1423 | rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R24, word); |
| 1424 | rt2x00_eeprom_dbg(rt2x00dev, "BBPtune r24: 0x%04x\n", word); |
| 1425 | } |
| 1426 | |
| 1427 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &word); |
| 1428 | if (word == 0xffff) { |
| 1429 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_LOW, 0x40); |
| 1430 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_HIGH, 0x50); |
| 1431 | rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R25, word); |
| 1432 | rt2x00_eeprom_dbg(rt2x00dev, "BBPtune r25: 0x%04x\n", word); |
| 1433 | } |
| 1434 | |
| 1435 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &word); |
| 1436 | if (word == 0xffff) { |
| 1437 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_LOW, 0x60); |
| 1438 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_HIGH, 0x6d); |
| 1439 | rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R61, word); |
| 1440 | rt2x00_eeprom_dbg(rt2x00dev, "BBPtune r61: 0x%04x\n", word); |
| 1441 | } |
| 1442 | |
| 1443 | return 0; |
| 1444 | } |
| 1445 | |
| 1446 | static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev) |
| 1447 | { |
| 1448 | u16 reg; |
| 1449 | u16 value; |
| 1450 | u16 eeprom; |
| 1451 | |
| 1452 | /* |
| 1453 | * Read EEPROM word for configuration. |
| 1454 | */ |
| 1455 | rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom); |
| 1456 | |
| 1457 | /* |
| 1458 | * Identify RF chipset. |
| 1459 | */ |
| 1460 | value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE); |
| 1461 | rt2500usb_register_read(rt2x00dev, MAC_CSR0, ®); |
| 1462 | rt2x00_set_chip(rt2x00dev, RT2570, value, reg); |
| 1463 | |
| 1464 | if (((reg & 0xfff0) != 0) || ((reg & 0x0000000f) == 0)) { |
| 1465 | rt2x00_err(rt2x00dev, "Invalid RT chipset detected\n"); |
| 1466 | return -ENODEV; |
| 1467 | } |
| 1468 | |
| 1469 | if (!rt2x00_rf(rt2x00dev, RF2522) && |
| 1470 | !rt2x00_rf(rt2x00dev, RF2523) && |
| 1471 | !rt2x00_rf(rt2x00dev, RF2524) && |
| 1472 | !rt2x00_rf(rt2x00dev, RF2525) && |
| 1473 | !rt2x00_rf(rt2x00dev, RF2525E) && |
| 1474 | !rt2x00_rf(rt2x00dev, RF5222)) { |
| 1475 | rt2x00_err(rt2x00dev, "Invalid RF chipset detected\n"); |
| 1476 | return -ENODEV; |
| 1477 | } |
| 1478 | |
| 1479 | /* |
| 1480 | * Identify default antenna configuration. |
| 1481 | */ |
| 1482 | rt2x00dev->default_ant.tx = |
| 1483 | rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT); |
| 1484 | rt2x00dev->default_ant.rx = |
| 1485 | rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT); |
| 1486 | |
| 1487 | /* |
| 1488 | * When the eeprom indicates SW_DIVERSITY use HW_DIVERSITY instead. |
| 1489 | * I am not 100% sure about this, but the legacy drivers do not |
| 1490 | * indicate antenna swapping in software is required when |
| 1491 | * diversity is enabled. |
| 1492 | */ |
| 1493 | if (rt2x00dev->default_ant.tx == ANTENNA_SW_DIVERSITY) |
| 1494 | rt2x00dev->default_ant.tx = ANTENNA_HW_DIVERSITY; |
| 1495 | if (rt2x00dev->default_ant.rx == ANTENNA_SW_DIVERSITY) |
| 1496 | rt2x00dev->default_ant.rx = ANTENNA_HW_DIVERSITY; |
| 1497 | |
| 1498 | /* |
| 1499 | * Store led mode, for correct led behaviour. |
| 1500 | */ |
| 1501 | #ifdef CONFIG_RT2X00_LIB_LEDS |
| 1502 | value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE); |
| 1503 | |
| 1504 | rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_radio, LED_TYPE_RADIO); |
| 1505 | if (value == LED_MODE_TXRX_ACTIVITY || |
| 1506 | value == LED_MODE_DEFAULT || |
| 1507 | value == LED_MODE_ASUS) |
| 1508 | rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_qual, |
| 1509 | LED_TYPE_ACTIVITY); |
| 1510 | #endif /* CONFIG_RT2X00_LIB_LEDS */ |
| 1511 | |
| 1512 | /* |
| 1513 | * Detect if this device has an hardware controlled radio. |
| 1514 | */ |
| 1515 | if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_HARDWARE_RADIO)) |
| 1516 | __set_bit(CAPABILITY_HW_BUTTON, &rt2x00dev->cap_flags); |
| 1517 | |
| 1518 | /* |
| 1519 | * Read the RSSI <-> dBm offset information. |
| 1520 | */ |
| 1521 | rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &eeprom); |
| 1522 | rt2x00dev->rssi_offset = |
| 1523 | rt2x00_get_field16(eeprom, EEPROM_CALIBRATE_OFFSET_RSSI); |
| 1524 | |
| 1525 | return 0; |
| 1526 | } |
| 1527 | |
| 1528 | /* |
| 1529 | * RF value list for RF2522 |
| 1530 | * Supports: 2.4 GHz |
| 1531 | */ |
| 1532 | static const struct rf_channel rf_vals_bg_2522[] = { |
| 1533 | { 1, 0x00002050, 0x000c1fda, 0x00000101, 0 }, |
| 1534 | { 2, 0x00002050, 0x000c1fee, 0x00000101, 0 }, |
| 1535 | { 3, 0x00002050, 0x000c2002, 0x00000101, 0 }, |
| 1536 | { 4, 0x00002050, 0x000c2016, 0x00000101, 0 }, |
| 1537 | { 5, 0x00002050, 0x000c202a, 0x00000101, 0 }, |
| 1538 | { 6, 0x00002050, 0x000c203e, 0x00000101, 0 }, |
| 1539 | { 7, 0x00002050, 0x000c2052, 0x00000101, 0 }, |
| 1540 | { 8, 0x00002050, 0x000c2066, 0x00000101, 0 }, |
| 1541 | { 9, 0x00002050, 0x000c207a, 0x00000101, 0 }, |
| 1542 | { 10, 0x00002050, 0x000c208e, 0x00000101, 0 }, |
| 1543 | { 11, 0x00002050, 0x000c20a2, 0x00000101, 0 }, |
| 1544 | { 12, 0x00002050, 0x000c20b6, 0x00000101, 0 }, |
| 1545 | { 13, 0x00002050, 0x000c20ca, 0x00000101, 0 }, |
| 1546 | { 14, 0x00002050, 0x000c20fa, 0x00000101, 0 }, |
| 1547 | }; |
| 1548 | |
| 1549 | /* |
| 1550 | * RF value list for RF2523 |
| 1551 | * Supports: 2.4 GHz |
| 1552 | */ |
| 1553 | static const struct rf_channel rf_vals_bg_2523[] = { |
| 1554 | { 1, 0x00022010, 0x00000c9e, 0x000e0111, 0x00000a1b }, |
| 1555 | { 2, 0x00022010, 0x00000ca2, 0x000e0111, 0x00000a1b }, |
| 1556 | { 3, 0x00022010, 0x00000ca6, 0x000e0111, 0x00000a1b }, |
| 1557 | { 4, 0x00022010, 0x00000caa, 0x000e0111, 0x00000a1b }, |
| 1558 | { 5, 0x00022010, 0x00000cae, 0x000e0111, 0x00000a1b }, |
| 1559 | { 6, 0x00022010, 0x00000cb2, 0x000e0111, 0x00000a1b }, |
| 1560 | { 7, 0x00022010, 0x00000cb6, 0x000e0111, 0x00000a1b }, |
| 1561 | { 8, 0x00022010, 0x00000cba, 0x000e0111, 0x00000a1b }, |
| 1562 | { 9, 0x00022010, 0x00000cbe, 0x000e0111, 0x00000a1b }, |
| 1563 | { 10, 0x00022010, 0x00000d02, 0x000e0111, 0x00000a1b }, |
| 1564 | { 11, 0x00022010, 0x00000d06, 0x000e0111, 0x00000a1b }, |
| 1565 | { 12, 0x00022010, 0x00000d0a, 0x000e0111, 0x00000a1b }, |
| 1566 | { 13, 0x00022010, 0x00000d0e, 0x000e0111, 0x00000a1b }, |
| 1567 | { 14, 0x00022010, 0x00000d1a, 0x000e0111, 0x00000a03 }, |
| 1568 | }; |
| 1569 | |
| 1570 | /* |
| 1571 | * RF value list for RF2524 |
| 1572 | * Supports: 2.4 GHz |
| 1573 | */ |
| 1574 | static const struct rf_channel rf_vals_bg_2524[] = { |
| 1575 | { 1, 0x00032020, 0x00000c9e, 0x00000101, 0x00000a1b }, |
| 1576 | { 2, 0x00032020, 0x00000ca2, 0x00000101, 0x00000a1b }, |
| 1577 | { 3, 0x00032020, 0x00000ca6, 0x00000101, 0x00000a1b }, |
| 1578 | { 4, 0x00032020, 0x00000caa, 0x00000101, 0x00000a1b }, |
| 1579 | { 5, 0x00032020, 0x00000cae, 0x00000101, 0x00000a1b }, |
| 1580 | { 6, 0x00032020, 0x00000cb2, 0x00000101, 0x00000a1b }, |
| 1581 | { 7, 0x00032020, 0x00000cb6, 0x00000101, 0x00000a1b }, |
| 1582 | { 8, 0x00032020, 0x00000cba, 0x00000101, 0x00000a1b }, |
| 1583 | { 9, 0x00032020, 0x00000cbe, 0x00000101, 0x00000a1b }, |
| 1584 | { 10, 0x00032020, 0x00000d02, 0x00000101, 0x00000a1b }, |
| 1585 | { 11, 0x00032020, 0x00000d06, 0x00000101, 0x00000a1b }, |
| 1586 | { 12, 0x00032020, 0x00000d0a, 0x00000101, 0x00000a1b }, |
| 1587 | { 13, 0x00032020, 0x00000d0e, 0x00000101, 0x00000a1b }, |
| 1588 | { 14, 0x00032020, 0x00000d1a, 0x00000101, 0x00000a03 }, |
| 1589 | }; |
| 1590 | |
| 1591 | /* |
| 1592 | * RF value list for RF2525 |
| 1593 | * Supports: 2.4 GHz |
| 1594 | */ |
| 1595 | static const struct rf_channel rf_vals_bg_2525[] = { |
| 1596 | { 1, 0x00022020, 0x00080c9e, 0x00060111, 0x00000a1b }, |
| 1597 | { 2, 0x00022020, 0x00080ca2, 0x00060111, 0x00000a1b }, |
| 1598 | { 3, 0x00022020, 0x00080ca6, 0x00060111, 0x00000a1b }, |
| 1599 | { 4, 0x00022020, 0x00080caa, 0x00060111, 0x00000a1b }, |
| 1600 | { 5, 0x00022020, 0x00080cae, 0x00060111, 0x00000a1b }, |
| 1601 | { 6, 0x00022020, 0x00080cb2, 0x00060111, 0x00000a1b }, |
| 1602 | { 7, 0x00022020, 0x00080cb6, 0x00060111, 0x00000a1b }, |
| 1603 | { 8, 0x00022020, 0x00080cba, 0x00060111, 0x00000a1b }, |
| 1604 | { 9, 0x00022020, 0x00080cbe, 0x00060111, 0x00000a1b }, |
| 1605 | { 10, 0x00022020, 0x00080d02, 0x00060111, 0x00000a1b }, |
| 1606 | { 11, 0x00022020, 0x00080d06, 0x00060111, 0x00000a1b }, |
| 1607 | { 12, 0x00022020, 0x00080d0a, 0x00060111, 0x00000a1b }, |
| 1608 | { 13, 0x00022020, 0x00080d0e, 0x00060111, 0x00000a1b }, |
| 1609 | { 14, 0x00022020, 0x00080d1a, 0x00060111, 0x00000a03 }, |
| 1610 | }; |
| 1611 | |
| 1612 | /* |
| 1613 | * RF value list for RF2525e |
| 1614 | * Supports: 2.4 GHz |
| 1615 | */ |
| 1616 | static const struct rf_channel rf_vals_bg_2525e[] = { |
| 1617 | { 1, 0x00022010, 0x0000089a, 0x00060111, 0x00000e1b }, |
| 1618 | { 2, 0x00022010, 0x0000089e, 0x00060111, 0x00000e07 }, |
| 1619 | { 3, 0x00022010, 0x0000089e, 0x00060111, 0x00000e1b }, |
| 1620 | { 4, 0x00022010, 0x000008a2, 0x00060111, 0x00000e07 }, |
| 1621 | { 5, 0x00022010, 0x000008a2, 0x00060111, 0x00000e1b }, |
| 1622 | { 6, 0x00022010, 0x000008a6, 0x00060111, 0x00000e07 }, |
| 1623 | { 7, 0x00022010, 0x000008a6, 0x00060111, 0x00000e1b }, |
| 1624 | { 8, 0x00022010, 0x000008aa, 0x00060111, 0x00000e07 }, |
| 1625 | { 9, 0x00022010, 0x000008aa, 0x00060111, 0x00000e1b }, |
| 1626 | { 10, 0x00022010, 0x000008ae, 0x00060111, 0x00000e07 }, |
| 1627 | { 11, 0x00022010, 0x000008ae, 0x00060111, 0x00000e1b }, |
| 1628 | { 12, 0x00022010, 0x000008b2, 0x00060111, 0x00000e07 }, |
| 1629 | { 13, 0x00022010, 0x000008b2, 0x00060111, 0x00000e1b }, |
| 1630 | { 14, 0x00022010, 0x000008b6, 0x00060111, 0x00000e23 }, |
| 1631 | }; |
| 1632 | |
| 1633 | /* |
| 1634 | * RF value list for RF5222 |
| 1635 | * Supports: 2.4 GHz & 5.2 GHz |
| 1636 | */ |
| 1637 | static const struct rf_channel rf_vals_5222[] = { |
| 1638 | { 1, 0x00022020, 0x00001136, 0x00000101, 0x00000a0b }, |
| 1639 | { 2, 0x00022020, 0x0000113a, 0x00000101, 0x00000a0b }, |
| 1640 | { 3, 0x00022020, 0x0000113e, 0x00000101, 0x00000a0b }, |
| 1641 | { 4, 0x00022020, 0x00001182, 0x00000101, 0x00000a0b }, |
| 1642 | { 5, 0x00022020, 0x00001186, 0x00000101, 0x00000a0b }, |
| 1643 | { 6, 0x00022020, 0x0000118a, 0x00000101, 0x00000a0b }, |
| 1644 | { 7, 0x00022020, 0x0000118e, 0x00000101, 0x00000a0b }, |
| 1645 | { 8, 0x00022020, 0x00001192, 0x00000101, 0x00000a0b }, |
| 1646 | { 9, 0x00022020, 0x00001196, 0x00000101, 0x00000a0b }, |
| 1647 | { 10, 0x00022020, 0x0000119a, 0x00000101, 0x00000a0b }, |
| 1648 | { 11, 0x00022020, 0x0000119e, 0x00000101, 0x00000a0b }, |
| 1649 | { 12, 0x00022020, 0x000011a2, 0x00000101, 0x00000a0b }, |
| 1650 | { 13, 0x00022020, 0x000011a6, 0x00000101, 0x00000a0b }, |
| 1651 | { 14, 0x00022020, 0x000011ae, 0x00000101, 0x00000a1b }, |
| 1652 | |
| 1653 | /* 802.11 UNI / HyperLan 2 */ |
| 1654 | { 36, 0x00022010, 0x00018896, 0x00000101, 0x00000a1f }, |
| 1655 | { 40, 0x00022010, 0x0001889a, 0x00000101, 0x00000a1f }, |
| 1656 | { 44, 0x00022010, 0x0001889e, 0x00000101, 0x00000a1f }, |
| 1657 | { 48, 0x00022010, 0x000188a2, 0x00000101, 0x00000a1f }, |
| 1658 | { 52, 0x00022010, 0x000188a6, 0x00000101, 0x00000a1f }, |
| 1659 | { 66, 0x00022010, 0x000188aa, 0x00000101, 0x00000a1f }, |
| 1660 | { 60, 0x00022010, 0x000188ae, 0x00000101, 0x00000a1f }, |
| 1661 | { 64, 0x00022010, 0x000188b2, 0x00000101, 0x00000a1f }, |
| 1662 | |
| 1663 | /* 802.11 HyperLan 2 */ |
| 1664 | { 100, 0x00022010, 0x00008802, 0x00000101, 0x00000a0f }, |
| 1665 | { 104, 0x00022010, 0x00008806, 0x00000101, 0x00000a0f }, |
| 1666 | { 108, 0x00022010, 0x0000880a, 0x00000101, 0x00000a0f }, |
| 1667 | { 112, 0x00022010, 0x0000880e, 0x00000101, 0x00000a0f }, |
| 1668 | { 116, 0x00022010, 0x00008812, 0x00000101, 0x00000a0f }, |
| 1669 | { 120, 0x00022010, 0x00008816, 0x00000101, 0x00000a0f }, |
| 1670 | { 124, 0x00022010, 0x0000881a, 0x00000101, 0x00000a0f }, |
| 1671 | { 128, 0x00022010, 0x0000881e, 0x00000101, 0x00000a0f }, |
| 1672 | { 132, 0x00022010, 0x00008822, 0x00000101, 0x00000a0f }, |
| 1673 | { 136, 0x00022010, 0x00008826, 0x00000101, 0x00000a0f }, |
| 1674 | |
| 1675 | /* 802.11 UNII */ |
| 1676 | { 140, 0x00022010, 0x0000882a, 0x00000101, 0x00000a0f }, |
| 1677 | { 149, 0x00022020, 0x000090a6, 0x00000101, 0x00000a07 }, |
| 1678 | { 153, 0x00022020, 0x000090ae, 0x00000101, 0x00000a07 }, |
| 1679 | { 157, 0x00022020, 0x000090b6, 0x00000101, 0x00000a07 }, |
| 1680 | { 161, 0x00022020, 0x000090be, 0x00000101, 0x00000a07 }, |
| 1681 | }; |
| 1682 | |
| 1683 | static int rt2500usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev) |
| 1684 | { |
| 1685 | struct hw_mode_spec *spec = &rt2x00dev->spec; |
| 1686 | struct channel_info *info; |
| 1687 | char *tx_power; |
| 1688 | unsigned int i; |
| 1689 | |
| 1690 | /* |
| 1691 | * Initialize all hw fields. |
| 1692 | * |
| 1693 | * Don't set IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING unless we are |
| 1694 | * capable of sending the buffered frames out after the DTIM |
| 1695 | * transmission using rt2x00lib_beacondone. This will send out |
| 1696 | * multicast and broadcast traffic immediately instead of buffering it |
| 1697 | * infinitly and thus dropping it after some time. |
| 1698 | */ |
| 1699 | ieee80211_hw_set(rt2x00dev->hw, PS_NULLFUNC_STACK); |
| 1700 | ieee80211_hw_set(rt2x00dev->hw, SUPPORTS_PS); |
| 1701 | ieee80211_hw_set(rt2x00dev->hw, RX_INCLUDES_FCS); |
| 1702 | ieee80211_hw_set(rt2x00dev->hw, SIGNAL_DBM); |
| 1703 | |
| 1704 | /* |
| 1705 | * Disable powersaving as default. |
| 1706 | */ |
| 1707 | rt2x00dev->hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT; |
| 1708 | |
| 1709 | SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev); |
| 1710 | SET_IEEE80211_PERM_ADDR(rt2x00dev->hw, |
| 1711 | rt2x00_eeprom_addr(rt2x00dev, |
| 1712 | EEPROM_MAC_ADDR_0)); |
| 1713 | |
| 1714 | /* |
| 1715 | * Initialize hw_mode information. |
| 1716 | */ |
| 1717 | spec->supported_bands = SUPPORT_BAND_2GHZ; |
| 1718 | spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM; |
| 1719 | |
| 1720 | if (rt2x00_rf(rt2x00dev, RF2522)) { |
| 1721 | spec->num_channels = ARRAY_SIZE(rf_vals_bg_2522); |
| 1722 | spec->channels = rf_vals_bg_2522; |
| 1723 | } else if (rt2x00_rf(rt2x00dev, RF2523)) { |
| 1724 | spec->num_channels = ARRAY_SIZE(rf_vals_bg_2523); |
| 1725 | spec->channels = rf_vals_bg_2523; |
| 1726 | } else if (rt2x00_rf(rt2x00dev, RF2524)) { |
| 1727 | spec->num_channels = ARRAY_SIZE(rf_vals_bg_2524); |
| 1728 | spec->channels = rf_vals_bg_2524; |
| 1729 | } else if (rt2x00_rf(rt2x00dev, RF2525)) { |
| 1730 | spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525); |
| 1731 | spec->channels = rf_vals_bg_2525; |
| 1732 | } else if (rt2x00_rf(rt2x00dev, RF2525E)) { |
| 1733 | spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e); |
| 1734 | spec->channels = rf_vals_bg_2525e; |
| 1735 | } else if (rt2x00_rf(rt2x00dev, RF5222)) { |
| 1736 | spec->supported_bands |= SUPPORT_BAND_5GHZ; |
| 1737 | spec->num_channels = ARRAY_SIZE(rf_vals_5222); |
| 1738 | spec->channels = rf_vals_5222; |
| 1739 | } |
| 1740 | |
| 1741 | /* |
| 1742 | * Create channel information array |
| 1743 | */ |
| 1744 | info = kcalloc(spec->num_channels, sizeof(*info), GFP_KERNEL); |
| 1745 | if (!info) |
| 1746 | return -ENOMEM; |
| 1747 | |
| 1748 | spec->channels_info = info; |
| 1749 | |
| 1750 | tx_power = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_START); |
| 1751 | for (i = 0; i < 14; i++) { |
| 1752 | info[i].max_power = MAX_TXPOWER; |
| 1753 | info[i].default_power1 = TXPOWER_FROM_DEV(tx_power[i]); |
| 1754 | } |
| 1755 | |
| 1756 | if (spec->num_channels > 14) { |
| 1757 | for (i = 14; i < spec->num_channels; i++) { |
| 1758 | info[i].max_power = MAX_TXPOWER; |
| 1759 | info[i].default_power1 = DEFAULT_TXPOWER; |
| 1760 | } |
| 1761 | } |
| 1762 | |
| 1763 | return 0; |
| 1764 | } |
| 1765 | |
| 1766 | static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev) |
| 1767 | { |
| 1768 | int retval; |
| 1769 | u16 reg; |
| 1770 | |
| 1771 | /* |
| 1772 | * Allocate eeprom data. |
| 1773 | */ |
| 1774 | retval = rt2500usb_validate_eeprom(rt2x00dev); |
| 1775 | if (retval) |
| 1776 | return retval; |
| 1777 | |
| 1778 | retval = rt2500usb_init_eeprom(rt2x00dev); |
| 1779 | if (retval) |
| 1780 | return retval; |
| 1781 | |
| 1782 | /* |
| 1783 | * Enable rfkill polling by setting GPIO direction of the |
| 1784 | * rfkill switch GPIO pin correctly. |
| 1785 | */ |
| 1786 | rt2500usb_register_read(rt2x00dev, MAC_CSR19, ®); |
| 1787 | rt2x00_set_field16(®, MAC_CSR19_DIR0, 0); |
| 1788 | rt2500usb_register_write(rt2x00dev, MAC_CSR19, reg); |
| 1789 | |
| 1790 | /* |
| 1791 | * Initialize hw specifications. |
| 1792 | */ |
| 1793 | retval = rt2500usb_probe_hw_mode(rt2x00dev); |
| 1794 | if (retval) |
| 1795 | return retval; |
| 1796 | |
| 1797 | /* |
| 1798 | * This device requires the atim queue |
| 1799 | */ |
| 1800 | __set_bit(REQUIRE_ATIM_QUEUE, &rt2x00dev->cap_flags); |
| 1801 | __set_bit(REQUIRE_BEACON_GUARD, &rt2x00dev->cap_flags); |
| 1802 | if (!modparam_nohwcrypt) { |
| 1803 | __set_bit(CAPABILITY_HW_CRYPTO, &rt2x00dev->cap_flags); |
| 1804 | __set_bit(REQUIRE_COPY_IV, &rt2x00dev->cap_flags); |
| 1805 | } |
| 1806 | __set_bit(REQUIRE_SW_SEQNO, &rt2x00dev->cap_flags); |
| 1807 | __set_bit(REQUIRE_PS_AUTOWAKE, &rt2x00dev->cap_flags); |
| 1808 | |
| 1809 | /* |
| 1810 | * Set the rssi offset. |
| 1811 | */ |
| 1812 | rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET; |
| 1813 | |
| 1814 | return 0; |
| 1815 | } |
| 1816 | |
| 1817 | static const struct ieee80211_ops rt2500usb_mac80211_ops = { |
| 1818 | .tx = rt2x00mac_tx, |
| 1819 | .start = rt2x00mac_start, |
| 1820 | .stop = rt2x00mac_stop, |
| 1821 | .add_interface = rt2x00mac_add_interface, |
| 1822 | .remove_interface = rt2x00mac_remove_interface, |
| 1823 | .config = rt2x00mac_config, |
| 1824 | .configure_filter = rt2x00mac_configure_filter, |
| 1825 | .set_tim = rt2x00mac_set_tim, |
| 1826 | .set_key = rt2x00mac_set_key, |
| 1827 | .sw_scan_start = rt2x00mac_sw_scan_start, |
| 1828 | .sw_scan_complete = rt2x00mac_sw_scan_complete, |
| 1829 | .get_stats = rt2x00mac_get_stats, |
| 1830 | .bss_info_changed = rt2x00mac_bss_info_changed, |
| 1831 | .conf_tx = rt2x00mac_conf_tx, |
| 1832 | .rfkill_poll = rt2x00mac_rfkill_poll, |
| 1833 | .flush = rt2x00mac_flush, |
| 1834 | .set_antenna = rt2x00mac_set_antenna, |
| 1835 | .get_antenna = rt2x00mac_get_antenna, |
| 1836 | .get_ringparam = rt2x00mac_get_ringparam, |
| 1837 | .tx_frames_pending = rt2x00mac_tx_frames_pending, |
| 1838 | }; |
| 1839 | |
| 1840 | static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = { |
| 1841 | .probe_hw = rt2500usb_probe_hw, |
| 1842 | .initialize = rt2x00usb_initialize, |
| 1843 | .uninitialize = rt2x00usb_uninitialize, |
| 1844 | .clear_entry = rt2x00usb_clear_entry, |
| 1845 | .set_device_state = rt2500usb_set_device_state, |
| 1846 | .rfkill_poll = rt2500usb_rfkill_poll, |
| 1847 | .link_stats = rt2500usb_link_stats, |
| 1848 | .reset_tuner = rt2500usb_reset_tuner, |
| 1849 | .watchdog = rt2x00usb_watchdog, |
| 1850 | .start_queue = rt2500usb_start_queue, |
| 1851 | .kick_queue = rt2x00usb_kick_queue, |
| 1852 | .stop_queue = rt2500usb_stop_queue, |
| 1853 | .flush_queue = rt2x00usb_flush_queue, |
| 1854 | .write_tx_desc = rt2500usb_write_tx_desc, |
| 1855 | .write_beacon = rt2500usb_write_beacon, |
| 1856 | .get_tx_data_len = rt2500usb_get_tx_data_len, |
| 1857 | .fill_rxdone = rt2500usb_fill_rxdone, |
| 1858 | .config_shared_key = rt2500usb_config_key, |
| 1859 | .config_pairwise_key = rt2500usb_config_key, |
| 1860 | .config_filter = rt2500usb_config_filter, |
| 1861 | .config_intf = rt2500usb_config_intf, |
| 1862 | .config_erp = rt2500usb_config_erp, |
| 1863 | .config_ant = rt2500usb_config_ant, |
| 1864 | .config = rt2500usb_config, |
| 1865 | }; |
| 1866 | |
| 1867 | static void rt2500usb_queue_init(struct data_queue *queue) |
| 1868 | { |
| 1869 | switch (queue->qid) { |
| 1870 | case QID_RX: |
| 1871 | queue->limit = 32; |
| 1872 | queue->data_size = DATA_FRAME_SIZE; |
| 1873 | queue->desc_size = RXD_DESC_SIZE; |
| 1874 | queue->priv_size = sizeof(struct queue_entry_priv_usb); |
| 1875 | break; |
| 1876 | |
| 1877 | case QID_AC_VO: |
| 1878 | case QID_AC_VI: |
| 1879 | case QID_AC_BE: |
| 1880 | case QID_AC_BK: |
| 1881 | queue->limit = 32; |
| 1882 | queue->data_size = DATA_FRAME_SIZE; |
| 1883 | queue->desc_size = TXD_DESC_SIZE; |
| 1884 | queue->priv_size = sizeof(struct queue_entry_priv_usb); |
| 1885 | break; |
| 1886 | |
| 1887 | case QID_BEACON: |
| 1888 | queue->limit = 1; |
| 1889 | queue->data_size = MGMT_FRAME_SIZE; |
| 1890 | queue->desc_size = TXD_DESC_SIZE; |
| 1891 | queue->priv_size = sizeof(struct queue_entry_priv_usb_bcn); |
| 1892 | break; |
| 1893 | |
| 1894 | case QID_ATIM: |
| 1895 | queue->limit = 8; |
| 1896 | queue->data_size = DATA_FRAME_SIZE; |
| 1897 | queue->desc_size = TXD_DESC_SIZE; |
| 1898 | queue->priv_size = sizeof(struct queue_entry_priv_usb); |
| 1899 | break; |
| 1900 | |
| 1901 | default: |
| 1902 | BUG(); |
| 1903 | break; |
| 1904 | } |
| 1905 | } |
| 1906 | |
| 1907 | static const struct rt2x00_ops rt2500usb_ops = { |
| 1908 | .name = KBUILD_MODNAME, |
| 1909 | .max_ap_intf = 1, |
| 1910 | .eeprom_size = EEPROM_SIZE, |
| 1911 | .rf_size = RF_SIZE, |
| 1912 | .tx_queues = NUM_TX_QUEUES, |
| 1913 | .queue_init = rt2500usb_queue_init, |
| 1914 | .lib = &rt2500usb_rt2x00_ops, |
| 1915 | .hw = &rt2500usb_mac80211_ops, |
| 1916 | #ifdef CONFIG_RT2X00_LIB_DEBUGFS |
| 1917 | .debugfs = &rt2500usb_rt2x00debug, |
| 1918 | #endif /* CONFIG_RT2X00_LIB_DEBUGFS */ |
| 1919 | }; |
| 1920 | |
| 1921 | /* |
| 1922 | * rt2500usb module information. |
| 1923 | */ |
| 1924 | static struct usb_device_id rt2500usb_device_table[] = { |
| 1925 | /* ASUS */ |
| 1926 | { USB_DEVICE(0x0b05, 0x1706) }, |
| 1927 | { USB_DEVICE(0x0b05, 0x1707) }, |
| 1928 | /* Belkin */ |
| 1929 | { USB_DEVICE(0x050d, 0x7050) }, /* FCC ID: K7SF5D7050A ver. 2.x */ |
| 1930 | { USB_DEVICE(0x050d, 0x7051) }, |
| 1931 | /* Cisco Systems */ |
| 1932 | { USB_DEVICE(0x13b1, 0x000d) }, |
| 1933 | { USB_DEVICE(0x13b1, 0x0011) }, |
| 1934 | { USB_DEVICE(0x13b1, 0x001a) }, |
| 1935 | /* Conceptronic */ |
| 1936 | { USB_DEVICE(0x14b2, 0x3c02) }, |
| 1937 | /* D-LINK */ |
| 1938 | { USB_DEVICE(0x2001, 0x3c00) }, |
| 1939 | /* Gigabyte */ |
| 1940 | { USB_DEVICE(0x1044, 0x8001) }, |
| 1941 | { USB_DEVICE(0x1044, 0x8007) }, |
| 1942 | /* Hercules */ |
| 1943 | { USB_DEVICE(0x06f8, 0xe000) }, |
| 1944 | /* Melco */ |
| 1945 | { USB_DEVICE(0x0411, 0x005e) }, |
| 1946 | { USB_DEVICE(0x0411, 0x0066) }, |
| 1947 | { USB_DEVICE(0x0411, 0x0067) }, |
| 1948 | { USB_DEVICE(0x0411, 0x008b) }, |
| 1949 | { USB_DEVICE(0x0411, 0x0097) }, |
| 1950 | /* MSI */ |
| 1951 | { USB_DEVICE(0x0db0, 0x6861) }, |
| 1952 | { USB_DEVICE(0x0db0, 0x6865) }, |
| 1953 | { USB_DEVICE(0x0db0, 0x6869) }, |
| 1954 | /* Ralink */ |
| 1955 | { USB_DEVICE(0x148f, 0x1706) }, |
| 1956 | { USB_DEVICE(0x148f, 0x2570) }, |
| 1957 | { USB_DEVICE(0x148f, 0x9020) }, |
| 1958 | /* Sagem */ |
| 1959 | { USB_DEVICE(0x079b, 0x004b) }, |
| 1960 | /* Siemens */ |
| 1961 | { USB_DEVICE(0x0681, 0x3c06) }, |
| 1962 | /* SMC */ |
| 1963 | { USB_DEVICE(0x0707, 0xee13) }, |
| 1964 | /* Spairon */ |
| 1965 | { USB_DEVICE(0x114b, 0x0110) }, |
| 1966 | /* SURECOM */ |
| 1967 | { USB_DEVICE(0x0769, 0x11f3) }, |
| 1968 | /* Trust */ |
| 1969 | { USB_DEVICE(0x0eb0, 0x9020) }, |
| 1970 | /* VTech */ |
| 1971 | { USB_DEVICE(0x0f88, 0x3012) }, |
| 1972 | /* Zinwell */ |
| 1973 | { USB_DEVICE(0x5a57, 0x0260) }, |
| 1974 | { 0, } |
| 1975 | }; |
| 1976 | |
| 1977 | MODULE_AUTHOR(DRV_PROJECT); |
| 1978 | MODULE_VERSION(DRV_VERSION); |
| 1979 | MODULE_DESCRIPTION("Ralink RT2500 USB Wireless LAN driver."); |
| 1980 | MODULE_SUPPORTED_DEVICE("Ralink RT2570 USB chipset based cards"); |
| 1981 | MODULE_DEVICE_TABLE(usb, rt2500usb_device_table); |
| 1982 | MODULE_LICENSE("GPL"); |
| 1983 | |
| 1984 | static int rt2500usb_probe(struct usb_interface *usb_intf, |
| 1985 | const struct usb_device_id *id) |
| 1986 | { |
| 1987 | return rt2x00usb_probe(usb_intf, &rt2500usb_ops); |
| 1988 | } |
| 1989 | |
| 1990 | static struct usb_driver rt2500usb_driver = { |
| 1991 | .name = KBUILD_MODNAME, |
| 1992 | .id_table = rt2500usb_device_table, |
| 1993 | .probe = rt2500usb_probe, |
| 1994 | .disconnect = rt2x00usb_disconnect, |
| 1995 | .suspend = rt2x00usb_suspend, |
| 1996 | .resume = rt2x00usb_resume, |
| 1997 | .reset_resume = rt2x00usb_resume, |
| 1998 | .disable_hub_initiated_lpm = 1, |
| 1999 | }; |
| 2000 | |
| 2001 | module_usb_driver(rt2500usb_driver); |