Kyle Swenson | 8d8f654 | 2021-03-15 11:02:55 -0600 | [diff] [blame^] | 1 | /* |
| 2 | * s2mps14.h |
| 3 | * |
| 4 | * Copyright (c) 2014 Samsung Electronics Co., Ltd |
| 5 | * http://www.samsung.com |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify it |
| 8 | * under the terms of the GNU General Public License as published by the |
| 9 | * Free Software Foundation; either version 2 of the License, or (at your |
| 10 | * option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | */ |
| 18 | |
| 19 | #ifndef __LINUX_MFD_S2MPS14_H |
| 20 | #define __LINUX_MFD_S2MPS14_H |
| 21 | |
| 22 | /* S2MPS14 registers */ |
| 23 | enum s2mps14_reg { |
| 24 | S2MPS14_REG_ID, |
| 25 | S2MPS14_REG_INT1, |
| 26 | S2MPS14_REG_INT2, |
| 27 | S2MPS14_REG_INT3, |
| 28 | S2MPS14_REG_INT1M, |
| 29 | S2MPS14_REG_INT2M, |
| 30 | S2MPS14_REG_INT3M, |
| 31 | S2MPS14_REG_ST1, |
| 32 | S2MPS14_REG_ST2, |
| 33 | S2MPS14_REG_PWRONSRC, |
| 34 | S2MPS14_REG_OFFSRC, |
| 35 | S2MPS14_REG_BU_CHG, |
| 36 | S2MPS14_REG_RTCCTRL, |
| 37 | S2MPS14_REG_CTRL1, |
| 38 | S2MPS14_REG_CTRL2, |
| 39 | S2MPS14_REG_RSVD1, |
| 40 | S2MPS14_REG_RSVD2, |
| 41 | S2MPS14_REG_RSVD3, |
| 42 | S2MPS14_REG_RSVD4, |
| 43 | S2MPS14_REG_RSVD5, |
| 44 | S2MPS14_REG_RSVD6, |
| 45 | S2MPS14_REG_CTRL3, |
| 46 | S2MPS14_REG_RSVD7, |
| 47 | S2MPS14_REG_RSVD8, |
| 48 | S2MPS14_REG_WRSTBI, |
| 49 | S2MPS14_REG_B1CTRL1, |
| 50 | S2MPS14_REG_B1CTRL2, |
| 51 | S2MPS14_REG_B2CTRL1, |
| 52 | S2MPS14_REG_B2CTRL2, |
| 53 | S2MPS14_REG_B3CTRL1, |
| 54 | S2MPS14_REG_B3CTRL2, |
| 55 | S2MPS14_REG_B4CTRL1, |
| 56 | S2MPS14_REG_B4CTRL2, |
| 57 | S2MPS14_REG_B5CTRL1, |
| 58 | S2MPS14_REG_B5CTRL2, |
| 59 | S2MPS14_REG_L1CTRL, |
| 60 | S2MPS14_REG_L2CTRL, |
| 61 | S2MPS14_REG_L3CTRL, |
| 62 | S2MPS14_REG_L4CTRL, |
| 63 | S2MPS14_REG_L5CTRL, |
| 64 | S2MPS14_REG_L6CTRL, |
| 65 | S2MPS14_REG_L7CTRL, |
| 66 | S2MPS14_REG_L8CTRL, |
| 67 | S2MPS14_REG_L9CTRL, |
| 68 | S2MPS14_REG_L10CTRL, |
| 69 | S2MPS14_REG_L11CTRL, |
| 70 | S2MPS14_REG_L12CTRL, |
| 71 | S2MPS14_REG_L13CTRL, |
| 72 | S2MPS14_REG_L14CTRL, |
| 73 | S2MPS14_REG_L15CTRL, |
| 74 | S2MPS14_REG_L16CTRL, |
| 75 | S2MPS14_REG_L17CTRL, |
| 76 | S2MPS14_REG_L18CTRL, |
| 77 | S2MPS14_REG_L19CTRL, |
| 78 | S2MPS14_REG_L20CTRL, |
| 79 | S2MPS14_REG_L21CTRL, |
| 80 | S2MPS14_REG_L22CTRL, |
| 81 | S2MPS14_REG_L23CTRL, |
| 82 | S2MPS14_REG_L24CTRL, |
| 83 | S2MPS14_REG_L25CTRL, |
| 84 | S2MPS14_REG_LDODSCH1, |
| 85 | S2MPS14_REG_LDODSCH2, |
| 86 | S2MPS14_REG_LDODSCH3, |
| 87 | }; |
| 88 | |
| 89 | /* S2MPS14 regulator ids */ |
| 90 | enum s2mps14_regulators { |
| 91 | S2MPS14_LDO1, |
| 92 | S2MPS14_LDO2, |
| 93 | S2MPS14_LDO3, |
| 94 | S2MPS14_LDO4, |
| 95 | S2MPS14_LDO5, |
| 96 | S2MPS14_LDO6, |
| 97 | S2MPS14_LDO7, |
| 98 | S2MPS14_LDO8, |
| 99 | S2MPS14_LDO9, |
| 100 | S2MPS14_LDO10, |
| 101 | S2MPS14_LDO11, |
| 102 | S2MPS14_LDO12, |
| 103 | S2MPS14_LDO13, |
| 104 | S2MPS14_LDO14, |
| 105 | S2MPS14_LDO15, |
| 106 | S2MPS14_LDO16, |
| 107 | S2MPS14_LDO17, |
| 108 | S2MPS14_LDO18, |
| 109 | S2MPS14_LDO19, |
| 110 | S2MPS14_LDO20, |
| 111 | S2MPS14_LDO21, |
| 112 | S2MPS14_LDO22, |
| 113 | S2MPS14_LDO23, |
| 114 | S2MPS14_LDO24, |
| 115 | S2MPS14_LDO25, |
| 116 | S2MPS14_BUCK1, |
| 117 | S2MPS14_BUCK2, |
| 118 | S2MPS14_BUCK3, |
| 119 | S2MPS14_BUCK4, |
| 120 | S2MPS14_BUCK5, |
| 121 | |
| 122 | S2MPS14_REGULATOR_MAX, |
| 123 | }; |
| 124 | |
| 125 | /* Regulator constraints for BUCKx */ |
| 126 | #define S2MPS14_BUCK1235_START_SEL 0x20 |
| 127 | #define S2MPS14_BUCK4_START_SEL 0x40 |
| 128 | /* |
| 129 | * Default ramp delay in uv/us. Datasheet says that ramp delay can be |
| 130 | * controlled however it does not specify which register is used for that. |
| 131 | * Let's assume that default value will be set. |
| 132 | */ |
| 133 | #define S2MPS14_BUCK_RAMP_DELAY 12500 |
| 134 | |
| 135 | #define S2MPS14_LDO_VSEL_MASK 0x3F |
| 136 | #define S2MPS14_BUCK_VSEL_MASK 0xFF |
| 137 | #define S2MPS14_ENABLE_MASK (0x03 << S2MPS14_ENABLE_SHIFT) |
| 138 | #define S2MPS14_ENABLE_SHIFT 6 |
| 139 | /* On/Off controlled by PWREN */ |
| 140 | #define S2MPS14_ENABLE_SUSPEND (0x01 << S2MPS14_ENABLE_SHIFT) |
| 141 | /* On/Off controlled by LDO10EN or EMMCEN */ |
| 142 | #define S2MPS14_ENABLE_EXT_CONTROL (0x00 << S2MPS14_ENABLE_SHIFT) |
| 143 | #define S2MPS14_LDO_N_VOLTAGES (S2MPS14_LDO_VSEL_MASK + 1) |
| 144 | #define S2MPS14_BUCK_N_VOLTAGES (S2MPS14_BUCK_VSEL_MASK + 1) |
| 145 | |
| 146 | #endif /* __LINUX_MFD_S2MPS14_H */ |