| commit | b38dbd4622a2abeedf9fcb1806958d9afac0bbd4 | [log] [tgz] |
|---|---|---|
| author | Wolfgang Denk <wd@pollux.denx.de> | Mon Mar 13 00:46:05 2006 +0100 |
| committer | Wolfgang Denk <wd@pollux.denx.de> | Mon Mar 13 00:46:05 2006 +0100 |
| tree | 5141e4352c2db17593f8c30b0f19cb6ab3ba354d | |
| parent | f07217c9e2912af5b2f05d61829f62cc865b481f [diff] |
Fix bug in [id]cache_status commands for MPC85xx processors; should look at LSB of L1CSRn registers to determine if L1 cache is enabled, not the MSB. Patch by Murray Jensen, 19 Jul 2005