wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 1997-2002 ELTEC Elektronik AG |
| 3 | * Frank Gottschling <fgottschling@eltec.de> |
| 4 | * |
Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame^] | 5 | * SPDX-License-Identifier: GPL-2.0+ |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | /* |
| 9 | * smiLynxEM.h |
| 10 | * Silicon Motion graphic interface for sm810/sm710/sm712 accelerator |
| 11 | * |
| 12 | * |
| 13 | * modification history |
| 14 | * -------------------- |
| 15 | * 04-18-2002 Rewritten for U-Boot <fgottschling@eltec.de>. |
| 16 | */ |
| 17 | |
| 18 | #ifndef _SMI_LYNX_EM_H_ |
| 19 | #define _SMI_LYNX_EM_H_ |
| 20 | |
| 21 | /* |
| 22 | * SMI 710/712 have 4MB internal RAM; SMI 810 2MB internal + 2MB external |
| 23 | */ |
| 24 | #define VIDEO_MEM_SIZE 0x400000 |
| 25 | |
| 26 | /* |
| 27 | * Supported video modes for SMI Lynx E/EM/EM+ |
| 28 | */ |
| 29 | #define VIDEO_MODES 7 |
| 30 | #define DUAL_800_600 0 /* SMI710:VGA1:75Hz (pitch=1600) */ |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 31 | /* VGA2:60/120Hz (pitch=1600) */ |
| 32 | /* SMI810:VGA1:75Hz (pitch=1600) */ |
| 33 | /* VGA2:75Hz (pitch=1600) */ |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 34 | #define DUAL_1024_768 1 /* VGA1:75Hz VGA2:73Hz (pitch=2048) */ |
| 35 | #define SINGLE_800_600 2 /* VGA1:75Hz (pitch=800) */ |
| 36 | #define SINGLE_1024_768 3 /* VGA1:75Hz (pitch=1024) */ |
| 37 | #define SINGLE_1280_1024 4 /* VGA1:75Hz (pitch=1280) */ |
| 38 | #define TV_MODE_CCIR 5 /* VGA1:50Hz (h=720;v=576;pitch=720) */ |
| 39 | #define TV_MODE_EIA 6 /* VGA1:60Hz (h=720;v=484;pitch=720) */ |
| 40 | |
| 41 | |
| 42 | /* |
| 43 | * ISA mapped regs |
| 44 | */ |
| 45 | #define SMI_INDX_C4 (pGD->isaBase + 0x03c4) /* index reg */ |
| 46 | #define SMI_DATA_C5 (pGD->isaBase + 0x03c5) /* data reg */ |
| 47 | #define SMI_INDX_D4 (pGD->isaBase + 0x03d4) /* index reg */ |
| 48 | #define SMI_DATA_D5 (pGD->isaBase + 0x03d5) /* data reg */ |
| 49 | #define SMI_INDX_CE (pGD->isaBase + 0x03ce) /* index reg */ |
| 50 | #define SMI_DATA_CF (pGD->isaBase + 0x03cf) /* data reg */ |
| 51 | #define SMI_LOCK_REG (pGD->isaBase + 0x03c3) /* unlock/lock ext crt reg */ |
| 52 | #define SMI_MISC_REG (pGD->isaBase + 0x03c2) /* misc reg */ |
| 53 | #define SMI_LUT_MASK (pGD->isaBase + 0x03c6) /* lut mask reg */ |
| 54 | #define SMI_LUT_START (pGD->isaBase + 0x03c8) /* lut start index */ |
| 55 | #define SMI_LUT_RGB (pGD->isaBase + 0x03c9) /* lut colors auto incr.*/ |
| 56 | |
| 57 | |
| 58 | /* |
| 59 | * Video processor control |
| 60 | */ |
| 61 | typedef struct { |
| 62 | unsigned int control; |
| 63 | unsigned int colorKey; |
| 64 | unsigned int colorKeyMask; |
| 65 | unsigned int start; |
| 66 | unsigned short offset; |
| 67 | unsigned short width; |
| 68 | unsigned int fifoPrio; |
| 69 | unsigned int fifoERL; |
| 70 | unsigned int YUVtoRGB; |
| 71 | } SmiVideoProc; |
| 72 | |
| 73 | /* |
| 74 | * Video window control |
| 75 | */ |
| 76 | typedef struct { |
| 77 | unsigned short top; |
| 78 | unsigned short left; |
| 79 | unsigned short bottom; |
| 80 | unsigned short right; |
| 81 | unsigned int srcStart; |
| 82 | unsigned short width; |
| 83 | unsigned short offset; |
| 84 | unsigned char hStretch; |
| 85 | unsigned char vStretch; |
| 86 | } SmiVideoWin; |
| 87 | |
| 88 | /* |
| 89 | * Capture port control |
| 90 | */ |
| 91 | typedef struct { |
| 92 | unsigned int control; |
| 93 | unsigned short topClip; |
| 94 | unsigned short leftClip; |
| 95 | unsigned short srcHeight; |
| 96 | unsigned short srcWidth; |
| 97 | unsigned int srcBufStart1; |
| 98 | unsigned int srcBufStart2; |
| 99 | unsigned short srcOffset; |
| 100 | unsigned short fifoControl; |
| 101 | } SmiCapturePort; |
| 102 | |
| 103 | |
| 104 | /******************************************************************************/ |
| 105 | /* Export Graphic Driver Control */ |
| 106 | /******************************************************************************/ |
| 107 | |
| 108 | typedef struct { |
| 109 | unsigned int isaBase; |
| 110 | unsigned int pciBase; |
| 111 | unsigned int dprBase; |
| 112 | unsigned int vprBase; |
| 113 | unsigned int cprBase; |
| 114 | unsigned int frameAdrs; |
| 115 | unsigned int memSize; |
| 116 | unsigned int mode; |
| 117 | unsigned int gdfIndex; |
| 118 | unsigned int gdfBytesPP; |
| 119 | unsigned int fg; |
| 120 | unsigned int bg; |
| 121 | unsigned int plnSizeX; |
| 122 | unsigned int plnSizeY; |
| 123 | unsigned int winSizeX; |
| 124 | unsigned int winSizeY; |
| 125 | char modeIdent[80]; |
| 126 | } GraphicDevice; |
| 127 | |
| 128 | extern GraphicDevice smi; |
| 129 | |
| 130 | |
| 131 | /******************************************************************************/ |
| 132 | /* Export Graphic Functions */ |
| 133 | /******************************************************************************/ |
| 134 | |
| 135 | void *video_hw_init (void); /* returns GraphicDevice struct or NULL */ |
| 136 | |
| 137 | void video_hw_bitblt ( |
| 138 | unsigned int bpp, /* bytes per pixel */ |
| 139 | unsigned int src_x, /* source pos x */ |
| 140 | unsigned int src_y, /* source pos y */ |
| 141 | unsigned int dst_x, /* dest pos x */ |
| 142 | unsigned int dst_y, /* dest pos y */ |
| 143 | unsigned int dim_x, /* frame width */ |
| 144 | unsigned int dim_y /* frame height */ |
| 145 | ); |
| 146 | |
| 147 | void video_hw_rectfill ( |
| 148 | unsigned int bpp, /* bytes per pixel */ |
| 149 | unsigned int dst_x, /* dest pos x */ |
| 150 | unsigned int dst_y, /* dest pos y */ |
| 151 | unsigned int dim_x, /* frame width */ |
| 152 | unsigned int dim_y, /* frame height */ |
| 153 | unsigned int color /* fill color */ |
| 154 | ); |
| 155 | |
| 156 | void video_set_lut ( |
| 157 | unsigned int index, /* color number */ |
| 158 | unsigned char r, /* red */ |
| 159 | unsigned char g, /* green */ |
| 160 | unsigned char b /* blue */ |
| 161 | ); |
| 162 | |
| 163 | #endif /*_SMI_LYNX_EM_H_ */ |