Henrik Nordstrom | 14bc66b | 2014-06-13 22:55:50 +0200 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2012 Henrik Nordstrom <henrik@henriknordstrom.net> |
| 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0+ |
| 5 | */ |
| 6 | |
Paul Kocialkowski | 940382f | 2015-03-22 18:08:21 +0100 | [diff] [blame] | 7 | enum axp209_reg { |
| 8 | AXP209_POWER_STATUS = 0x00, |
| 9 | AXP209_CHIP_VERSION = 0x03, |
Hans de Goede | beba401 | 2015-10-04 12:01:17 +0200 | [diff] [blame^] | 10 | AXP209_OUTPUT_CTRL = 0x12, |
Paul Kocialkowski | 940382f | 2015-03-22 18:08:21 +0100 | [diff] [blame] | 11 | AXP209_DCDC2_VOLTAGE = 0x23, |
| 12 | AXP209_DCDC3_VOLTAGE = 0x27, |
| 13 | AXP209_LDO24_VOLTAGE = 0x28, |
| 14 | AXP209_LDO3_VOLTAGE = 0x29, |
| 15 | AXP209_IRQ_ENABLE1 = 0x40, |
| 16 | AXP209_IRQ_ENABLE2 = 0x41, |
| 17 | AXP209_IRQ_ENABLE3 = 0x42, |
| 18 | AXP209_IRQ_ENABLE4 = 0x43, |
| 19 | AXP209_IRQ_ENABLE5 = 0x44, |
| 20 | AXP209_IRQ_STATUS5 = 0x4c, |
| 21 | AXP209_SHUTDOWN = 0x32, |
Paul Kocialkowski | 940382f | 2015-03-22 18:08:21 +0100 | [diff] [blame] | 22 | }; |
| 23 | |
| 24 | #define AXP209_POWER_STATUS_ON_BY_DC (1 << 0) |
| 25 | #define AXP209_POWER_STATUS_VBUS_USABLE (1 << 4) |
| 26 | |
Hans de Goede | beba401 | 2015-10-04 12:01:17 +0200 | [diff] [blame^] | 27 | #define AXP209_OUTPUT_CTRL_EXTEN (1 << 0) |
| 28 | #define AXP209_OUTPUT_CTRL_DCDC3 (1 << 1) |
| 29 | #define AXP209_OUTPUT_CTRL_LDO2 (1 << 2) |
| 30 | #define AXP209_OUTPUT_CTRL_LDO4 (1 << 3) |
| 31 | #define AXP209_OUTPUT_CTRL_DCDC2 (1 << 4) |
| 32 | #define AXP209_OUTPUT_CTRL_LDO3 (1 << 6) |
| 33 | |
Paul Kocialkowski | 940382f | 2015-03-22 18:08:21 +0100 | [diff] [blame] | 34 | #define AXP209_IRQ5_PEK_UP (1 << 6) |
| 35 | #define AXP209_IRQ5_PEK_DOWN (1 << 5) |
| 36 | |
| 37 | #define AXP209_POWEROFF (1 << 7) |
| 38 | |
Hans de Goede | 2fcf033 | 2015-04-25 17:25:14 +0200 | [diff] [blame] | 39 | /* For axp_gpio.c */ |
| 40 | #define AXP_POWER_STATUS 0x00 |
| 41 | #define AXP_POWER_STATUS_VBUS_PRESENT (1 << 5) |
| 42 | #define AXP_GPIO0_CTRL 0x90 |
| 43 | #define AXP_GPIO1_CTRL 0x92 |
| 44 | #define AXP_GPIO2_CTRL 0x93 |
| 45 | #define AXP_GPIO_CTRL_OUTPUT_LOW 0x00 /* Drive pin low */ |
| 46 | #define AXP_GPIO_CTRL_OUTPUT_HIGH 0x01 /* Drive pin high */ |
| 47 | #define AXP_GPIO_CTRL_INPUT 0x02 /* Input */ |
| 48 | #define AXP_GPIO_STATE 0x94 |
| 49 | #define AXP_GPIO_STATE_OFFSET 4 |