wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2001 |
| 3 | * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com. |
| 4 | * |
Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 5 | * SPDX-License-Identifier: GPL-2.0+ |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | /* |
| 9 | * This provides a bit-banged interface to the ethernet MII management |
| 10 | * channel. |
| 11 | */ |
| 12 | |
| 13 | #include <common.h> |
Simon Glass | c74c8e6 | 2015-04-05 16:07:39 -0600 | [diff] [blame^] | 14 | #include <dm.h> |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 15 | #include <miiphy.h> |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 16 | #include <phy.h> |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 17 | |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 18 | #include <asm/types.h> |
| 19 | #include <linux/list.h> |
| 20 | #include <malloc.h> |
| 21 | #include <net.h> |
| 22 | |
| 23 | /* local debug macro */ |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 24 | #undef MII_DEBUG |
| 25 | |
| 26 | #undef debug |
| 27 | #ifdef MII_DEBUG |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 28 | #define debug(fmt, args...) printf(fmt, ##args) |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 29 | #else |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 30 | #define debug(fmt, args...) |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 31 | #endif /* MII_DEBUG */ |
| 32 | |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 33 | static struct list_head mii_devs; |
| 34 | static struct mii_dev *current_mii; |
| 35 | |
Mike Frysinger | 0daac97 | 2010-07-27 18:35:09 -0400 | [diff] [blame] | 36 | /* |
| 37 | * Lookup the mii_dev struct by the registered device name. |
| 38 | */ |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 39 | struct mii_dev *miiphy_get_dev_by_name(const char *devname) |
Mike Frysinger | 0daac97 | 2010-07-27 18:35:09 -0400 | [diff] [blame] | 40 | { |
| 41 | struct list_head *entry; |
| 42 | struct mii_dev *dev; |
| 43 | |
| 44 | if (!devname) { |
| 45 | printf("NULL device name!\n"); |
| 46 | return NULL; |
| 47 | } |
| 48 | |
| 49 | list_for_each(entry, &mii_devs) { |
| 50 | dev = list_entry(entry, struct mii_dev, link); |
| 51 | if (strcmp(dev->name, devname) == 0) |
| 52 | return dev; |
| 53 | } |
| 54 | |
Mike Frysinger | 0daac97 | 2010-07-27 18:35:09 -0400 | [diff] [blame] | 55 | return NULL; |
| 56 | } |
| 57 | |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 58 | /***************************************************************************** |
| 59 | * |
Marian Balakowicz | d9785c1 | 2005-11-30 18:06:04 +0100 | [diff] [blame] | 60 | * Initialize global data. Need to be called before any other miiphy routine. |
| 61 | */ |
Mike Frysinger | 5700bb6 | 2010-07-27 18:35:08 -0400 | [diff] [blame] | 62 | void miiphy_init(void) |
Marian Balakowicz | d9785c1 | 2005-11-30 18:06:04 +0100 | [diff] [blame] | 63 | { |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 64 | INIT_LIST_HEAD(&mii_devs); |
Larry Johnson | 298035d | 2007-10-31 11:21:29 -0500 | [diff] [blame] | 65 | current_mii = NULL; |
Marian Balakowicz | d9785c1 | 2005-11-30 18:06:04 +0100 | [diff] [blame] | 66 | } |
| 67 | |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 68 | static int legacy_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg) |
| 69 | { |
| 70 | unsigned short val; |
| 71 | int ret; |
| 72 | struct legacy_mii_dev *ldev = bus->priv; |
| 73 | |
| 74 | ret = ldev->read(bus->name, addr, reg, &val); |
| 75 | |
| 76 | return ret ? -1 : (int)val; |
| 77 | } |
| 78 | |
| 79 | static int legacy_miiphy_write(struct mii_dev *bus, int addr, int devad, |
| 80 | int reg, u16 val) |
| 81 | { |
| 82 | struct legacy_mii_dev *ldev = bus->priv; |
| 83 | |
| 84 | return ldev->write(bus->name, addr, reg, val); |
| 85 | } |
| 86 | |
Marian Balakowicz | d9785c1 | 2005-11-30 18:06:04 +0100 | [diff] [blame] | 87 | /***************************************************************************** |
| 88 | * |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 89 | * Register read and write MII access routines for the device <name>. |
Andy Fleming | 1cdabc4 | 2011-10-31 09:46:13 -0500 | [diff] [blame] | 90 | * This API is now deprecated. Please use mdio_alloc and mdio_register, instead. |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 91 | */ |
Mike Frysinger | 5700bb6 | 2010-07-27 18:35:08 -0400 | [diff] [blame] | 92 | void miiphy_register(const char *name, |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 93 | int (*read)(const char *devname, unsigned char addr, |
Wolfgang Denk | f915c93 | 2011-12-07 08:35:14 +0100 | [diff] [blame] | 94 | unsigned char reg, unsigned short *value), |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 95 | int (*write)(const char *devname, unsigned char addr, |
Wolfgang Denk | f915c93 | 2011-12-07 08:35:14 +0100 | [diff] [blame] | 96 | unsigned char reg, unsigned short value)) |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 97 | { |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 98 | struct mii_dev *new_dev; |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 99 | struct legacy_mii_dev *ldev; |
Laurence Withers | 07c0763 | 2011-07-14 23:21:45 +0000 | [diff] [blame] | 100 | |
| 101 | BUG_ON(strlen(name) >= MDIO_NAME_LEN); |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 102 | |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 103 | /* check if we have unique name */ |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 104 | new_dev = miiphy_get_dev_by_name(name); |
Mike Frysinger | 0daac97 | 2010-07-27 18:35:09 -0400 | [diff] [blame] | 105 | if (new_dev) { |
| 106 | printf("miiphy_register: non unique device name '%s'\n", name); |
| 107 | return; |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 108 | } |
| 109 | |
| 110 | /* allocate memory */ |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 111 | new_dev = mdio_alloc(); |
| 112 | ldev = malloc(sizeof(*ldev)); |
| 113 | |
| 114 | if (new_dev == NULL || ldev == NULL) { |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 115 | printf("miiphy_register: cannot allocate memory for '%s'\n", |
Larry Johnson | 298035d | 2007-10-31 11:21:29 -0500 | [diff] [blame] | 116 | name); |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 117 | return; |
| 118 | } |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 119 | |
| 120 | /* initalize mii_dev struct fields */ |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 121 | new_dev->read = legacy_miiphy_read; |
| 122 | new_dev->write = legacy_miiphy_write; |
Laurence Withers | 07c0763 | 2011-07-14 23:21:45 +0000 | [diff] [blame] | 123 | strncpy(new_dev->name, name, MDIO_NAME_LEN); |
| 124 | new_dev->name[MDIO_NAME_LEN - 1] = 0; |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 125 | ldev->read = read; |
| 126 | ldev->write = write; |
| 127 | new_dev->priv = ldev; |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 128 | |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 129 | debug("miiphy_register: added '%s', read=0x%08lx, write=0x%08lx\n", |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 130 | new_dev->name, ldev->read, ldev->write); |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 131 | |
| 132 | /* add it to the list */ |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 133 | list_add_tail(&new_dev->link, &mii_devs); |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 134 | |
| 135 | if (!current_mii) |
| 136 | current_mii = new_dev; |
| 137 | } |
| 138 | |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 139 | struct mii_dev *mdio_alloc(void) |
| 140 | { |
| 141 | struct mii_dev *bus; |
| 142 | |
| 143 | bus = malloc(sizeof(*bus)); |
| 144 | if (!bus) |
| 145 | return bus; |
| 146 | |
| 147 | memset(bus, 0, sizeof(*bus)); |
| 148 | |
| 149 | /* initalize mii_dev struct fields */ |
| 150 | INIT_LIST_HEAD(&bus->link); |
| 151 | |
| 152 | return bus; |
| 153 | } |
| 154 | |
| 155 | int mdio_register(struct mii_dev *bus) |
| 156 | { |
| 157 | if (!bus || !bus->name || !bus->read || !bus->write) |
| 158 | return -1; |
| 159 | |
| 160 | /* check if we have unique name */ |
| 161 | if (miiphy_get_dev_by_name(bus->name)) { |
| 162 | printf("mdio_register: non unique device name '%s'\n", |
| 163 | bus->name); |
| 164 | return -1; |
| 165 | } |
| 166 | |
| 167 | /* add it to the list */ |
| 168 | list_add_tail(&bus->link, &mii_devs); |
| 169 | |
| 170 | if (!current_mii) |
| 171 | current_mii = bus; |
| 172 | |
| 173 | return 0; |
| 174 | } |
| 175 | |
| 176 | void mdio_list_devices(void) |
| 177 | { |
| 178 | struct list_head *entry; |
| 179 | |
| 180 | list_for_each(entry, &mii_devs) { |
| 181 | int i; |
| 182 | struct mii_dev *bus = list_entry(entry, struct mii_dev, link); |
| 183 | |
| 184 | printf("%s:\n", bus->name); |
| 185 | |
| 186 | for (i = 0; i < PHY_MAX_ADDR; i++) { |
| 187 | struct phy_device *phydev = bus->phymap[i]; |
| 188 | |
| 189 | if (phydev) { |
| 190 | printf("%d - %s", i, phydev->drv->name); |
| 191 | |
| 192 | if (phydev->dev) |
| 193 | printf(" <--> %s\n", phydev->dev->name); |
| 194 | else |
| 195 | printf("\n"); |
| 196 | } |
| 197 | } |
| 198 | } |
| 199 | } |
| 200 | |
Mike Frysinger | 5700bb6 | 2010-07-27 18:35:08 -0400 | [diff] [blame] | 201 | int miiphy_set_current_dev(const char *devname) |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 202 | { |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 203 | struct mii_dev *dev; |
| 204 | |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 205 | dev = miiphy_get_dev_by_name(devname); |
Mike Frysinger | 0daac97 | 2010-07-27 18:35:09 -0400 | [diff] [blame] | 206 | if (dev) { |
| 207 | current_mii = dev; |
| 208 | return 0; |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 209 | } |
| 210 | |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 211 | printf("No such device: %s\n", devname); |
| 212 | |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 213 | return 1; |
| 214 | } |
| 215 | |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 216 | struct mii_dev *mdio_get_current_dev(void) |
| 217 | { |
| 218 | return current_mii; |
| 219 | } |
| 220 | |
| 221 | struct phy_device *mdio_phydev_for_ethname(const char *ethname) |
| 222 | { |
| 223 | struct list_head *entry; |
| 224 | struct mii_dev *bus; |
| 225 | |
| 226 | list_for_each(entry, &mii_devs) { |
| 227 | int i; |
| 228 | bus = list_entry(entry, struct mii_dev, link); |
| 229 | |
| 230 | for (i = 0; i < PHY_MAX_ADDR; i++) { |
| 231 | if (!bus->phymap[i] || !bus->phymap[i]->dev) |
| 232 | continue; |
| 233 | |
| 234 | if (strcmp(bus->phymap[i]->dev->name, ethname) == 0) |
| 235 | return bus->phymap[i]; |
| 236 | } |
| 237 | } |
| 238 | |
| 239 | printf("%s is not a known ethernet\n", ethname); |
| 240 | return NULL; |
| 241 | } |
| 242 | |
Mike Frysinger | 5700bb6 | 2010-07-27 18:35:08 -0400 | [diff] [blame] | 243 | const char *miiphy_get_current_dev(void) |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 244 | { |
| 245 | if (current_mii) |
| 246 | return current_mii->name; |
| 247 | |
| 248 | return NULL; |
| 249 | } |
| 250 | |
Mike Frysinger | ede16ea | 2010-07-27 18:35:10 -0400 | [diff] [blame] | 251 | static struct mii_dev *miiphy_get_active_dev(const char *devname) |
| 252 | { |
| 253 | /* If the current mii is the one we want, return it */ |
| 254 | if (current_mii) |
| 255 | if (strcmp(current_mii->name, devname) == 0) |
| 256 | return current_mii; |
| 257 | |
| 258 | /* Otherwise, set the active one to the one we want */ |
| 259 | if (miiphy_set_current_dev(devname)) |
| 260 | return NULL; |
| 261 | else |
| 262 | return current_mii; |
| 263 | } |
| 264 | |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 265 | /***************************************************************************** |
| 266 | * |
| 267 | * Read to variable <value> from the PHY attached to device <devname>, |
| 268 | * use PHY address <addr> and register <reg>. |
| 269 | * |
Andy Fleming | 1cdabc4 | 2011-10-31 09:46:13 -0500 | [diff] [blame] | 270 | * This API is deprecated. Use phy_read on a phy_device found via phy_connect |
| 271 | * |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 272 | * Returns: |
| 273 | * 0 on success |
| 274 | */ |
Wolfgang Denk | f915c93 | 2011-12-07 08:35:14 +0100 | [diff] [blame] | 275 | int miiphy_read(const char *devname, unsigned char addr, unsigned char reg, |
Larry Johnson | 298035d | 2007-10-31 11:21:29 -0500 | [diff] [blame] | 276 | unsigned short *value) |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 277 | { |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 278 | struct mii_dev *bus; |
Anatolij Gustschin | d67d5d5 | 2011-04-30 02:17:44 +0000 | [diff] [blame] | 279 | int ret; |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 280 | |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 281 | bus = miiphy_get_active_dev(devname); |
Anatolij Gustschin | d67d5d5 | 2011-04-30 02:17:44 +0000 | [diff] [blame] | 282 | if (!bus) |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 283 | return 1; |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 284 | |
Anatolij Gustschin | d67d5d5 | 2011-04-30 02:17:44 +0000 | [diff] [blame] | 285 | ret = bus->read(bus, addr, MDIO_DEVAD_NONE, reg); |
| 286 | if (ret < 0) |
| 287 | return 1; |
| 288 | |
| 289 | *value = (unsigned short)ret; |
| 290 | return 0; |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 291 | } |
| 292 | |
| 293 | /***************************************************************************** |
| 294 | * |
| 295 | * Write <value> to the PHY attached to device <devname>, |
| 296 | * use PHY address <addr> and register <reg>. |
| 297 | * |
Andy Fleming | 1cdabc4 | 2011-10-31 09:46:13 -0500 | [diff] [blame] | 298 | * This API is deprecated. Use phy_write on a phy_device found by phy_connect |
| 299 | * |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 300 | * Returns: |
| 301 | * 0 on success |
| 302 | */ |
Wolfgang Denk | f915c93 | 2011-12-07 08:35:14 +0100 | [diff] [blame] | 303 | int miiphy_write(const char *devname, unsigned char addr, unsigned char reg, |
Larry Johnson | 298035d | 2007-10-31 11:21:29 -0500 | [diff] [blame] | 304 | unsigned short value) |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 305 | { |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 306 | struct mii_dev *bus; |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 307 | |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 308 | bus = miiphy_get_active_dev(devname); |
| 309 | if (bus) |
| 310 | return bus->write(bus, addr, MDIO_DEVAD_NONE, reg, value); |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 311 | |
Mike Frysinger | 0daac97 | 2010-07-27 18:35:09 -0400 | [diff] [blame] | 312 | return 1; |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 313 | } |
| 314 | |
| 315 | /***************************************************************************** |
| 316 | * |
| 317 | * Print out list of registered MII capable devices. |
| 318 | */ |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 319 | void miiphy_listdev(void) |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 320 | { |
| 321 | struct list_head *entry; |
| 322 | struct mii_dev *dev; |
| 323 | |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 324 | puts("MII devices: "); |
| 325 | list_for_each(entry, &mii_devs) { |
| 326 | dev = list_entry(entry, struct mii_dev, link); |
| 327 | printf("'%s' ", dev->name); |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 328 | } |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 329 | puts("\n"); |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 330 | |
| 331 | if (current_mii) |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 332 | printf("Current device: '%s'\n", current_mii->name); |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 333 | } |
| 334 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 335 | /***************************************************************************** |
| 336 | * |
| 337 | * Read the OUI, manufacture's model number, and revision number. |
| 338 | * |
| 339 | * OUI: 22 bits (unsigned int) |
| 340 | * Model: 6 bits (unsigned char) |
| 341 | * Revision: 4 bits (unsigned char) |
| 342 | * |
Andy Fleming | 1cdabc4 | 2011-10-31 09:46:13 -0500 | [diff] [blame] | 343 | * This API is deprecated. |
| 344 | * |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 345 | * Returns: |
| 346 | * 0 on success |
| 347 | */ |
Mike Frysinger | 5700bb6 | 2010-07-27 18:35:08 -0400 | [diff] [blame] | 348 | int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui, |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 349 | unsigned char *model, unsigned char *rev) |
| 350 | { |
| 351 | unsigned int reg = 0; |
wdenk | 8bf3b00 | 2003-12-06 23:20:41 +0000 | [diff] [blame] | 352 | unsigned short tmp; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 353 | |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 354 | if (miiphy_read(devname, addr, MII_PHYSID2, &tmp) != 0) { |
| 355 | debug("PHY ID register 2 read failed\n"); |
| 356 | return -1; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 357 | } |
wdenk | 8bf3b00 | 2003-12-06 23:20:41 +0000 | [diff] [blame] | 358 | reg = tmp; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 359 | |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 360 | debug("MII_PHYSID2 @ 0x%x = 0x%04x\n", addr, reg); |
Shinya Kuribayashi | 26c7bab | 2008-01-19 10:25:59 +0900 | [diff] [blame] | 361 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 362 | if (reg == 0xFFFF) { |
| 363 | /* No physical device present at this address */ |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 364 | return -1; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 365 | } |
| 366 | |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 367 | if (miiphy_read(devname, addr, MII_PHYSID1, &tmp) != 0) { |
| 368 | debug("PHY ID register 1 read failed\n"); |
| 369 | return -1; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 370 | } |
wdenk | 8bf3b00 | 2003-12-06 23:20:41 +0000 | [diff] [blame] | 371 | reg |= tmp << 16; |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 372 | debug("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg); |
Shinya Kuribayashi | 26c7bab | 2008-01-19 10:25:59 +0900 | [diff] [blame] | 373 | |
Larry Johnson | 298035d | 2007-10-31 11:21:29 -0500 | [diff] [blame] | 374 | *oui = (reg >> 10); |
| 375 | *model = (unsigned char)((reg >> 4) & 0x0000003F); |
| 376 | *rev = (unsigned char)(reg & 0x0000000F); |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 377 | return 0; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 378 | } |
| 379 | |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 380 | #ifndef CONFIG_PHYLIB |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 381 | /***************************************************************************** |
| 382 | * |
| 383 | * Reset the PHY. |
Andy Fleming | 1cdabc4 | 2011-10-31 09:46:13 -0500 | [diff] [blame] | 384 | * |
| 385 | * This API is deprecated. Use PHYLIB. |
| 386 | * |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 387 | * Returns: |
| 388 | * 0 on success |
| 389 | */ |
Mike Frysinger | 5700bb6 | 2010-07-27 18:35:08 -0400 | [diff] [blame] | 390 | int miiphy_reset(const char *devname, unsigned char addr) |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 391 | { |
| 392 | unsigned short reg; |
Stefan Roese | ab5a0dc | 2010-02-02 13:43:48 +0100 | [diff] [blame] | 393 | int timeout = 500; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 394 | |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 395 | if (miiphy_read(devname, addr, MII_BMCR, ®) != 0) { |
| 396 | debug("PHY status read failed\n"); |
| 397 | return -1; |
Wolfgang Denk | f89920c | 2005-08-12 23:15:53 +0200 | [diff] [blame] | 398 | } |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 399 | if (miiphy_write(devname, addr, MII_BMCR, reg | BMCR_RESET) != 0) { |
| 400 | debug("PHY reset failed\n"); |
| 401 | return -1; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 402 | } |
wdenk | 5653fc3 | 2004-02-08 22:55:38 +0000 | [diff] [blame] | 403 | #ifdef CONFIG_PHY_RESET_DELAY |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 404 | udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */ |
wdenk | 5653fc3 | 2004-02-08 22:55:38 +0000 | [diff] [blame] | 405 | #endif |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 406 | /* |
| 407 | * Poll the control register for the reset bit to go to 0 (it is |
| 408 | * auto-clearing). This should happen within 0.5 seconds per the |
| 409 | * IEEE spec. |
| 410 | */ |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 411 | reg = 0x8000; |
Stefan Roese | ab5a0dc | 2010-02-02 13:43:48 +0100 | [diff] [blame] | 412 | while (((reg & 0x8000) != 0) && timeout--) { |
Mike Frysinger | 8ef583a | 2010-12-23 15:40:12 -0500 | [diff] [blame] | 413 | if (miiphy_read(devname, addr, MII_BMCR, ®) != 0) { |
Stefan Roese | ab5a0dc | 2010-02-02 13:43:48 +0100 | [diff] [blame] | 414 | debug("PHY status read failed\n"); |
| 415 | return -1; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 416 | } |
Stefan Roese | ab5a0dc | 2010-02-02 13:43:48 +0100 | [diff] [blame] | 417 | udelay(1000); |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 418 | } |
| 419 | if ((reg & 0x8000) == 0) { |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 420 | return 0; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 421 | } else { |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 422 | puts("PHY reset timed out\n"); |
| 423 | return -1; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 424 | } |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 425 | return 0; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 426 | } |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 427 | #endif /* !PHYLIB */ |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 428 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 429 | /***************************************************************************** |
| 430 | * |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 431 | * Determine the ethernet speed (10/100/1000). Return 10 on error. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 432 | */ |
Mike Frysinger | 5700bb6 | 2010-07-27 18:35:08 -0400 | [diff] [blame] | 433 | int miiphy_speed(const char *devname, unsigned char addr) |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 434 | { |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 435 | u16 bmcr, anlpar; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 436 | |
wdenk | 6fb6af6 | 2004-03-23 23:20:24 +0000 | [diff] [blame] | 437 | #if defined(CONFIG_PHY_GIGE) |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 438 | u16 btsr; |
| 439 | |
| 440 | /* |
| 441 | * Check for 1000BASE-X. If it is supported, then assume that the speed |
| 442 | * is 1000. |
| 443 | */ |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 444 | if (miiphy_is_1000base_x(devname, addr)) |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 445 | return _1000BASET; |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 446 | |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 447 | /* |
| 448 | * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set. |
| 449 | */ |
| 450 | /* Check for 1000BASE-T. */ |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 451 | if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) { |
| 452 | printf("PHY 1000BT status"); |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 453 | goto miiphy_read_failed; |
| 454 | } |
| 455 | if (btsr != 0xFFFF && |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 456 | (btsr & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD))) |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 457 | return _1000BASET; |
wdenk | 6fb6af6 | 2004-03-23 23:20:24 +0000 | [diff] [blame] | 458 | #endif /* CONFIG_PHY_GIGE */ |
wdenk | 855a496 | 2004-03-14 18:23:55 +0000 | [diff] [blame] | 459 | |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 460 | /* Check Basic Management Control Register first. */ |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 461 | if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) { |
| 462 | printf("PHY speed"); |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 463 | goto miiphy_read_failed; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 464 | } |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 465 | /* Check if auto-negotiation is on. */ |
Mike Frysinger | 8ef583a | 2010-12-23 15:40:12 -0500 | [diff] [blame] | 466 | if (bmcr & BMCR_ANENABLE) { |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 467 | /* Get auto-negotiation results. */ |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 468 | if (miiphy_read(devname, addr, MII_LPA, &anlpar)) { |
| 469 | printf("PHY AN speed"); |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 470 | goto miiphy_read_failed; |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 471 | } |
Mike Frysinger | 8ef583a | 2010-12-23 15:40:12 -0500 | [diff] [blame] | 472 | return (anlpar & LPA_100) ? _100BASET : _10BASET; |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 473 | } |
| 474 | /* Get speed from basic control settings. */ |
Mike Frysinger | 8ef583a | 2010-12-23 15:40:12 -0500 | [diff] [blame] | 475 | return (bmcr & BMCR_SPEED100) ? _100BASET : _10BASET; |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 476 | |
Michael Zaidman | 5f84195 | 2010-02-28 16:28:25 +0200 | [diff] [blame] | 477 | miiphy_read_failed: |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 478 | printf(" read failed, assuming 10BASE-T\n"); |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 479 | return _10BASET; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 480 | } |
| 481 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 482 | /***************************************************************************** |
| 483 | * |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 484 | * Determine full/half duplex. Return half on error. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 485 | */ |
Mike Frysinger | 5700bb6 | 2010-07-27 18:35:08 -0400 | [diff] [blame] | 486 | int miiphy_duplex(const char *devname, unsigned char addr) |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 487 | { |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 488 | u16 bmcr, anlpar; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 489 | |
wdenk | 6fb6af6 | 2004-03-23 23:20:24 +0000 | [diff] [blame] | 490 | #if defined(CONFIG_PHY_GIGE) |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 491 | u16 btsr; |
| 492 | |
| 493 | /* Check for 1000BASE-X. */ |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 494 | if (miiphy_is_1000base_x(devname, addr)) { |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 495 | /* 1000BASE-X */ |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 496 | if (miiphy_read(devname, addr, MII_LPA, &anlpar)) { |
| 497 | printf("1000BASE-X PHY AN duplex"); |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 498 | goto miiphy_read_failed; |
| 499 | } |
| 500 | } |
| 501 | /* |
| 502 | * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set. |
| 503 | */ |
| 504 | /* Check for 1000BASE-T. */ |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 505 | if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) { |
| 506 | printf("PHY 1000BT status"); |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 507 | goto miiphy_read_failed; |
| 508 | } |
| 509 | if (btsr != 0xFFFF) { |
| 510 | if (btsr & PHY_1000BTSR_1000FD) { |
| 511 | return FULL; |
| 512 | } else if (btsr & PHY_1000BTSR_1000HD) { |
| 513 | return HALF; |
wdenk | 855a496 | 2004-03-14 18:23:55 +0000 | [diff] [blame] | 514 | } |
| 515 | } |
wdenk | 6fb6af6 | 2004-03-23 23:20:24 +0000 | [diff] [blame] | 516 | #endif /* CONFIG_PHY_GIGE */ |
wdenk | 855a496 | 2004-03-14 18:23:55 +0000 | [diff] [blame] | 517 | |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 518 | /* Check Basic Management Control Register first. */ |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 519 | if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) { |
| 520 | puts("PHY duplex"); |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 521 | goto miiphy_read_failed; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 522 | } |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 523 | /* Check if auto-negotiation is on. */ |
Mike Frysinger | 8ef583a | 2010-12-23 15:40:12 -0500 | [diff] [blame] | 524 | if (bmcr & BMCR_ANENABLE) { |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 525 | /* Get auto-negotiation results. */ |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 526 | if (miiphy_read(devname, addr, MII_LPA, &anlpar)) { |
| 527 | puts("PHY AN duplex"); |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 528 | goto miiphy_read_failed; |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 529 | } |
Mike Frysinger | 8ef583a | 2010-12-23 15:40:12 -0500 | [diff] [blame] | 530 | return (anlpar & (LPA_10FULL | LPA_100FULL)) ? |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 531 | FULL : HALF; |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 532 | } |
| 533 | /* Get speed from basic control settings. */ |
Mike Frysinger | 8ef583a | 2010-12-23 15:40:12 -0500 | [diff] [blame] | 534 | return (bmcr & BMCR_FULLDPLX) ? FULL : HALF; |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 535 | |
Michael Zaidman | 5f84195 | 2010-02-28 16:28:25 +0200 | [diff] [blame] | 536 | miiphy_read_failed: |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 537 | printf(" read failed, assuming half duplex\n"); |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 538 | return HALF; |
| 539 | } |
| 540 | |
| 541 | /***************************************************************************** |
| 542 | * |
| 543 | * Return 1 if PHY supports 1000BASE-X, 0 if PHY supports 10BASE-T/100BASE-TX/ |
| 544 | * 1000BASE-T, or on error. |
| 545 | */ |
Mike Frysinger | 5700bb6 | 2010-07-27 18:35:08 -0400 | [diff] [blame] | 546 | int miiphy_is_1000base_x(const char *devname, unsigned char addr) |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 547 | { |
| 548 | #if defined(CONFIG_PHY_GIGE) |
| 549 | u16 exsr; |
| 550 | |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 551 | if (miiphy_read(devname, addr, MII_ESTATUS, &exsr)) { |
| 552 | printf("PHY extended status read failed, assuming no " |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 553 | "1000BASE-X\n"); |
| 554 | return 0; |
| 555 | } |
Mike Frysinger | 8ef583a | 2010-12-23 15:40:12 -0500 | [diff] [blame] | 556 | return 0 != (exsr & (ESTATUS_1000XF | ESTATUS_1000XH)); |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 557 | #else |
| 558 | return 0; |
| 559 | #endif |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 560 | } |
| 561 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 562 | #ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN |
wdenk | fc3e216 | 2003-10-08 22:33:00 +0000 | [diff] [blame] | 563 | /***************************************************************************** |
| 564 | * |
| 565 | * Determine link status |
| 566 | */ |
Mike Frysinger | 5700bb6 | 2010-07-27 18:35:08 -0400 | [diff] [blame] | 567 | int miiphy_link(const char *devname, unsigned char addr) |
wdenk | fc3e216 | 2003-10-08 22:33:00 +0000 | [diff] [blame] | 568 | { |
| 569 | unsigned short reg; |
| 570 | |
wdenk | a3d991b | 2004-04-15 21:48:45 +0000 | [diff] [blame] | 571 | /* dummy read; needed to latch some phys */ |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 572 | (void)miiphy_read(devname, addr, MII_BMSR, ®); |
| 573 | if (miiphy_read(devname, addr, MII_BMSR, ®)) { |
| 574 | puts("MII_BMSR read failed, assuming no link\n"); |
| 575 | return 0; |
wdenk | fc3e216 | 2003-10-08 22:33:00 +0000 | [diff] [blame] | 576 | } |
| 577 | |
| 578 | /* Determine if a link is active */ |
Mike Frysinger | 8ef583a | 2010-12-23 15:40:12 -0500 | [diff] [blame] | 579 | if ((reg & BMSR_LSTATUS) != 0) { |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 580 | return 1; |
wdenk | fc3e216 | 2003-10-08 22:33:00 +0000 | [diff] [blame] | 581 | } else { |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 582 | return 0; |
wdenk | fc3e216 | 2003-10-08 22:33:00 +0000 | [diff] [blame] | 583 | } |
| 584 | } |
| 585 | #endif |