blob: df728dd613cc29f0473da9b0141781ffab9cc0b0 [file] [log] [blame]
Pamidipati, Vijay7f413b52013-09-24 19:07:12 +05301/*
2 * Copyright (c) 2013, Qualcomm Atheros Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
10 * AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT
11 * INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
12 * LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE
13 * OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
14 * PERFORMANCE OF THIS SOFTWARE.
15 */
16
17/*
18 * nss_pm.h
19 * NSS PM Driver header file
20 */
21
22#ifndef __NSS_PM_H
23#define __NSS_PM_H
24
25#include <mach/msm_nss_gmac.h>
26#include <mach/msm_nss_crypto.h>
27#include <mach/msm_bus_board.h>
28#include <mach/msm_bus.h>
29#include "nss_api_if.h"
30
31/*
32 * NSS PM debug macros
33 */
34#if (NSS_PM_DEBUG_LEVEL < 1)
35#define nss_pm_assert(fmt, args...)
36#else
37#define nss_pm_assert(c) if (!(c)) { BUG_ON(!(c)); }
38#endif
39
40#if (NSS_PM_DEBUG_LEVEL < 2)
41#define nss_pm_warning(fmt, args...)
42#else
43#define nss_pm_warning(fmt, args...) printk(KERN_WARNING "nss_pm:"fmt, ##args)
44#endif
45
46#if (NSS_PM_DEBUG_LEVEL < 3)
47#define nss_pm_info(fmt, args...)
48#else
49#define nss_pm_info(fmt, args...) printk(KERN_INFO "nss_pm:"fmt, ##args)
50#endif
51
52#if (NSS_PM_DEBUG_LEVEL < 4)
53#define nss_pm_trace(fmt, args...)
54#else
55#define nss_pm_trace(fmt, args...) printk(KERN_DEBUG "nss_pm:"fmt, ##args)
56#endif
57
58
59/*
60 * PM Client data structure
61 */
62typedef struct {
63 uint32_t bus_perf_client;
64 uint32_t clk_handle;
65 uint32_t current_perf_lvl;
66 uint32_t auto_scale;
67 struct dentry *dentry;
68} nss_pm_client_data_t;
69
70/*
71 * NSS PM driver context
72 */
73struct nss_pm_global_ctx {
74 struct dentry *pm_dentry;
75 nss_pm_client_data_t nss_pm_client[NSS_PM_MAX_CLIENTS];
76};
77
78/*
79 * Macro defining Bus vector for GMAC driver
80 */
81#define GMAC_BW_MBPS(_data_bw, _desc_bw) \
82{ \
83 .vectors = (struct msm_bus_vectors[]){ \
84 {\
85 .src = MSM_BUS_MASTER_NSS_GMAC_0, \
86 .dst = MSM_BUS_SLAVE_EBI_CH0, \
87 .ab = (_data_bw) * 16 * 1000000ULL, \
88 .ib = (_data_bw) * 16 * 1000000ULL, \
89 }, \
90 { \
91 .src = MSM_BUS_MASTER_NSS_GMAC_0, \
92 .dst = MSM_BUS_SLAVE_NSS_TCM, \
93 .ab = (_desc_bw) * 8 * 1000000ULL, \
94 .ib = (_desc_bw) * 8 * 1000000ULL, \
95 }, \
96 }, \
97 .num_paths = 2, \
98}
99
100/*
101 * Macro defining Bus vector for NSS crypto driver
102 */
103#define CRYPTO_BW_MBPS(_data_bw, _desc_bw) \
104{ \
105 .vectors = (struct msm_bus_vectors[]){ \
106 {\
107 .src = MSM_BUS_MASTER_NSS_CRYPTO5_0, \
108 .dst = MSM_BUS_SLAVE_EBI_CH0, \
109 .ab = (_data_bw) * 16 * 1000000ULL, \
110 .ib = (_data_bw) * 16 * 1000000ULL, \
111 }, \
112 { \
113 .src = MSM_BUS_MASTER_NSS_CRYPTO5_0, \
114 .dst = MSM_BUS_SLAVE_NSS_TCM, \
115 .ab = (_desc_bw) * 8 * 1000000ULL, \
116 .ib = (_desc_bw) * 8 * 1000000ULL, \
117 }, \
118 }, \
119 .num_paths = 2, \
120}
121
122/*
123 * Macro defining Bus vector for NSS driver
124 *
125 */
126#define NETAP_BW_MBPS(_data_bw, _desc_bw) \
127{ \
128 .vectors = (struct msm_bus_vectors[]){ \
129 {\
130 .src = MSM_BUS_MASTER_UBI32_0, \
131 .dst = MSM_BUS_SLAVE_EBI_CH0, \
132 .ab = (_data_bw) * 16 * 1000000ULL, \
133 .ib = (_data_bw) * 16 * 1000000ULL, \
134 }, \
135 { \
136 .src = MSM_BUS_MASTER_UBI32_0, \
137 .dst = MSM_BUS_SLAVE_NSS_TCM, \
138 .ab = (_desc_bw) * 8 * 1000000ULL, \
139 .ib = (_desc_bw) * 8 * 1000000ULL, \
140 }, \
141 }, \
142 .num_paths = 2, \
143}
144
145/*
146 * Initialize NSS PM top level structures
147 */
148void nss_pm_init(void);
149
150#endif /** __NSS_PM_H */