| Damjan Marion | 47d165e | 2019-01-28 13:27:31 +0100 | [diff] [blame] | 1 | |
| 2 | #include <perfmon/perfmon_intel.h> |
| 3 | |
| 4 | static perfmon_intel_pmc_cpu_model_t cpu_model_table[] = { |
| 5 | {0x1E, 0x00, 0}, |
| 6 | {0x1F, 0x00, 0}, |
| 7 | {0x1A, 0x00, 0}, |
| 8 | |
| 9 | }; |
| 10 | |
| 11 | static perfmon_intel_pmc_event_t event_table[] = { |
| 12 | { |
| 13 | .event_code = {0x14}, |
| 14 | .umask = 0x1, |
| 15 | .event_name = "arith.cycles_div_busy", |
| 16 | }, |
| 17 | { |
| 18 | .event_code = {0x14}, |
| 19 | .umask = 0x1, |
| 20 | .event_name = "arith.div", |
| 21 | }, |
| 22 | { |
| 23 | .event_code = {0x14}, |
| 24 | .umask = 0x2, |
| 25 | .event_name = "arith.mul", |
| 26 | }, |
| 27 | { |
| 28 | .event_code = {0xE6}, |
| 29 | .umask = 0x2, |
| 30 | .event_name = "baclear.bad_target", |
| 31 | }, |
| 32 | { |
| 33 | .event_code = {0xE6}, |
| 34 | .umask = 0x1, |
| 35 | .event_name = "baclear.clear", |
| 36 | }, |
| 37 | { |
| 38 | .event_code = {0xA7}, |
| 39 | .umask = 0x1, |
| 40 | .event_name = "baclear_force_iq", |
| 41 | }, |
| 42 | { |
| 43 | .event_code = {0xE8}, |
| 44 | .umask = 0x1, |
| 45 | .event_name = "bpu_clears.early", |
| 46 | }, |
| 47 | { |
| 48 | .event_code = {0xE8}, |
| 49 | .umask = 0x2, |
| 50 | .event_name = "bpu_clears.late", |
| 51 | }, |
| 52 | { |
| 53 | .event_code = {0xE5}, |
| 54 | .umask = 0x1, |
| 55 | .event_name = "bpu_missed_call_ret", |
| 56 | }, |
| 57 | { |
| 58 | .event_code = {0xE0}, |
| 59 | .umask = 0x1, |
| 60 | .event_name = "br_inst_decoded", |
| 61 | }, |
| 62 | { |
| 63 | .event_code = {0x88}, |
| 64 | .umask = 0x7F, |
| 65 | .event_name = "br_inst_exec.any", |
| 66 | }, |
| 67 | { |
| 68 | .event_code = {0x88}, |
| 69 | .umask = 0x1, |
| 70 | .event_name = "br_inst_exec.cond", |
| 71 | }, |
| 72 | { |
| 73 | .event_code = {0x88}, |
| 74 | .umask = 0x2, |
| 75 | .event_name = "br_inst_exec.direct", |
| 76 | }, |
| 77 | { |
| 78 | .event_code = {0x88}, |
| 79 | .umask = 0x10, |
| 80 | .event_name = "br_inst_exec.direct_near_call", |
| 81 | }, |
| 82 | { |
| 83 | .event_code = {0x88}, |
| 84 | .umask = 0x20, |
| 85 | .event_name = "br_inst_exec.indirect_near_call", |
| 86 | }, |
| 87 | { |
| 88 | .event_code = {0x88}, |
| 89 | .umask = 0x4, |
| 90 | .event_name = "br_inst_exec.indirect_non_call", |
| 91 | }, |
| 92 | { |
| 93 | .event_code = {0x88}, |
| 94 | .umask = 0x30, |
| 95 | .event_name = "br_inst_exec.near_calls", |
| 96 | }, |
| 97 | { |
| 98 | .event_code = {0x88}, |
| 99 | .umask = 0x7, |
| 100 | .event_name = "br_inst_exec.non_calls", |
| 101 | }, |
| 102 | { |
| 103 | .event_code = {0x88}, |
| 104 | .umask = 0x8, |
| 105 | .event_name = "br_inst_exec.return_near", |
| 106 | }, |
| 107 | { |
| 108 | .event_code = {0x88}, |
| 109 | .umask = 0x40, |
| 110 | .event_name = "br_inst_exec.taken", |
| 111 | }, |
| 112 | { |
| 113 | .event_code = {0xC4}, |
| 114 | .umask = 0x4, |
| 115 | .event_name = "br_inst_retired.all_branches", |
| 116 | }, |
| 117 | { |
| 118 | .event_code = {0xC4}, |
| 119 | .umask = 0x1, |
| 120 | .event_name = "br_inst_retired.conditional", |
| 121 | }, |
| 122 | { |
| 123 | .event_code = {0xC4}, |
| 124 | .umask = 0x2, |
| 125 | .event_name = "br_inst_retired.near_call", |
| 126 | }, |
| 127 | { |
| 128 | .event_code = {0x89}, |
| 129 | .umask = 0x7F, |
| 130 | .event_name = "br_misp_exec.any", |
| 131 | }, |
| 132 | { |
| 133 | .event_code = {0x89}, |
| 134 | .umask = 0x1, |
| 135 | .event_name = "br_misp_exec.cond", |
| 136 | }, |
| 137 | { |
| 138 | .event_code = {0x89}, |
| 139 | .umask = 0x2, |
| 140 | .event_name = "br_misp_exec.direct", |
| 141 | }, |
| 142 | { |
| 143 | .event_code = {0x89}, |
| 144 | .umask = 0x10, |
| 145 | .event_name = "br_misp_exec.direct_near_call", |
| 146 | }, |
| 147 | { |
| 148 | .event_code = {0x89}, |
| 149 | .umask = 0x20, |
| 150 | .event_name = "br_misp_exec.indirect_near_call", |
| 151 | }, |
| 152 | { |
| 153 | .event_code = {0x89}, |
| 154 | .umask = 0x4, |
| 155 | .event_name = "br_misp_exec.indirect_non_call", |
| 156 | }, |
| 157 | { |
| 158 | .event_code = {0x89}, |
| 159 | .umask = 0x30, |
| 160 | .event_name = "br_misp_exec.near_calls", |
| 161 | }, |
| 162 | { |
| 163 | .event_code = {0x89}, |
| 164 | .umask = 0x7, |
| 165 | .event_name = "br_misp_exec.non_calls", |
| 166 | }, |
| 167 | { |
| 168 | .event_code = {0x89}, |
| 169 | .umask = 0x8, |
| 170 | .event_name = "br_misp_exec.return_near", |
| 171 | }, |
| 172 | { |
| 173 | .event_code = {0x89}, |
| 174 | .umask = 0x40, |
| 175 | .event_name = "br_misp_exec.taken", |
| 176 | }, |
| 177 | { |
| 178 | .event_code = {0xC5}, |
| 179 | .umask = 0x2, |
| 180 | .event_name = "br_misp_retired.near_call", |
| 181 | }, |
| 182 | { |
| 183 | .event_code = {0x63}, |
| 184 | .umask = 0x2, |
| 185 | .event_name = "cache_lock_cycles.l1d", |
| 186 | }, |
| 187 | { |
| 188 | .event_code = {0x63}, |
| 189 | .umask = 0x1, |
| 190 | .event_name = "cache_lock_cycles.l1d_l2", |
| 191 | }, |
| 192 | { |
| 193 | .event_code = {0x0}, |
| 194 | .umask = 0x0, |
| 195 | .event_name = "cpu_clk_unhalted.ref", |
| 196 | }, |
| 197 | { |
| 198 | .event_code = {0x3C}, |
| 199 | .umask = 0x1, |
| 200 | .event_name = "cpu_clk_unhalted.ref_p", |
| 201 | }, |
| 202 | { |
| 203 | .event_code = {0x0}, |
| 204 | .umask = 0x0, |
| 205 | .event_name = "cpu_clk_unhalted.thread", |
| 206 | }, |
| 207 | { |
| 208 | .event_code = {0x3C}, |
| 209 | .umask = 0x0, |
| 210 | .event_name = "cpu_clk_unhalted.thread_p", |
| 211 | }, |
| 212 | { |
| 213 | .event_code = {0x3C}, |
| 214 | .umask = 0x0, |
| 215 | .event_name = "cpu_clk_unhalted.total_cycles", |
| 216 | }, |
| 217 | { |
| 218 | .event_code = {0x8}, |
| 219 | .umask = 0x1, |
| 220 | .event_name = "dtlb_load_misses.any", |
| 221 | }, |
| 222 | { |
| 223 | .event_code = {0x8}, |
| 224 | .umask = 0x20, |
| 225 | .event_name = "dtlb_load_misses.pde_miss", |
| 226 | }, |
| 227 | { |
| 228 | .event_code = {0x8}, |
| 229 | .umask = 0x10, |
| 230 | .event_name = "dtlb_load_misses.stlb_hit", |
| 231 | }, |
| 232 | { |
| 233 | .event_code = {0x8}, |
| 234 | .umask = 0x2, |
| 235 | .event_name = "dtlb_load_misses.walk_completed", |
| 236 | }, |
| 237 | { |
| 238 | .event_code = {0x49}, |
| 239 | .umask = 0x1, |
| 240 | .event_name = "dtlb_misses.any", |
| 241 | }, |
| 242 | { |
| 243 | .event_code = {0x49}, |
| 244 | .umask = 0x10, |
| 245 | .event_name = "dtlb_misses.stlb_hit", |
| 246 | }, |
| 247 | { |
| 248 | .event_code = {0x49}, |
| 249 | .umask = 0x2, |
| 250 | .event_name = "dtlb_misses.walk_completed", |
| 251 | }, |
| 252 | { |
| 253 | .event_code = {0xD5}, |
| 254 | .umask = 0x1, |
| 255 | .event_name = "es_reg_renames", |
| 256 | }, |
| 257 | { |
| 258 | .event_code = {0xF7}, |
| 259 | .umask = 0x1, |
| 260 | .event_name = "fp_assist.all", |
| 261 | }, |
| 262 | { |
| 263 | .event_code = {0xF7}, |
| 264 | .umask = 0x4, |
| 265 | .event_name = "fp_assist.input", |
| 266 | }, |
| 267 | { |
| 268 | .event_code = {0xF7}, |
| 269 | .umask = 0x2, |
| 270 | .event_name = "fp_assist.output", |
| 271 | }, |
| 272 | { |
| 273 | .event_code = {0x10}, |
| 274 | .umask = 0x2, |
| 275 | .event_name = "fp_comp_ops_exe.mmx", |
| 276 | }, |
| 277 | { |
| 278 | .event_code = {0x10}, |
| 279 | .umask = 0x80, |
| 280 | .event_name = "fp_comp_ops_exe.sse_double_precision", |
| 281 | }, |
| 282 | { |
| 283 | .event_code = {0x10}, |
| 284 | .umask = 0x4, |
| 285 | .event_name = "fp_comp_ops_exe.sse_fp", |
| 286 | }, |
| 287 | { |
| 288 | .event_code = {0x10}, |
| 289 | .umask = 0x10, |
| 290 | .event_name = "fp_comp_ops_exe.sse_fp_packed", |
| 291 | }, |
| 292 | { |
| 293 | .event_code = {0x10}, |
| 294 | .umask = 0x20, |
| 295 | .event_name = "fp_comp_ops_exe.sse_fp_scalar", |
| 296 | }, |
| 297 | { |
| 298 | .event_code = {0x10}, |
| 299 | .umask = 0x40, |
| 300 | .event_name = "fp_comp_ops_exe.sse_single_precision", |
| 301 | }, |
| 302 | { |
| 303 | .event_code = {0x10}, |
| 304 | .umask = 0x8, |
| 305 | .event_name = "fp_comp_ops_exe.sse2_integer", |
| 306 | }, |
| 307 | { |
| 308 | .event_code = {0x10}, |
| 309 | .umask = 0x1, |
| 310 | .event_name = "fp_comp_ops_exe.x87", |
| 311 | }, |
| 312 | { |
| 313 | .event_code = {0xCC}, |
| 314 | .umask = 0x3, |
| 315 | .event_name = "fp_mmx_trans.any", |
| 316 | }, |
| 317 | { |
| 318 | .event_code = {0xCC}, |
| 319 | .umask = 0x1, |
| 320 | .event_name = "fp_mmx_trans.to_fp", |
| 321 | }, |
| 322 | { |
| 323 | .event_code = {0xCC}, |
| 324 | .umask = 0x2, |
| 325 | .event_name = "fp_mmx_trans.to_mmx", |
| 326 | }, |
| 327 | { |
| 328 | .event_code = {0x87}, |
| 329 | .umask = 0xF, |
| 330 | .event_name = "ild_stall.any", |
| 331 | }, |
| 332 | { |
| 333 | .event_code = {0x87}, |
| 334 | .umask = 0x4, |
| 335 | .event_name = "ild_stall.iq_full", |
| 336 | }, |
| 337 | { |
| 338 | .event_code = {0x87}, |
| 339 | .umask = 0x1, |
| 340 | .event_name = "ild_stall.lcp", |
| 341 | }, |
| 342 | { |
| 343 | .event_code = {0x87}, |
| 344 | .umask = 0x2, |
| 345 | .event_name = "ild_stall.mru", |
| 346 | }, |
| 347 | { |
| 348 | .event_code = {0x87}, |
| 349 | .umask = 0x8, |
| 350 | .event_name = "ild_stall.regen", |
| 351 | }, |
| 352 | { |
| 353 | .event_code = {0x18}, |
| 354 | .umask = 0x1, |
| 355 | .event_name = "inst_decoded.dec0", |
| 356 | }, |
| 357 | { |
| 358 | .event_code = {0x1E}, |
| 359 | .umask = 0x1, |
| 360 | .event_name = "inst_queue_write_cycles", |
| 361 | }, |
| 362 | { |
| 363 | .event_code = {0x17}, |
| 364 | .umask = 0x1, |
| 365 | .event_name = "inst_queue_writes", |
| 366 | }, |
| 367 | { |
| 368 | .event_code = {0x0}, |
| 369 | .umask = 0x0, |
| 370 | .event_name = "inst_retired.any", |
| 371 | }, |
| 372 | { |
| 373 | .event_code = {0xC0}, |
| 374 | .umask = 0x1, |
| 375 | .event_name = "inst_retired.any_p", |
| 376 | }, |
| 377 | { |
| 378 | .event_code = {0xC0}, |
| 379 | .umask = 0x4, |
| 380 | .event_name = "inst_retired.mmx", |
| 381 | }, |
| 382 | { |
| 383 | .event_code = {0xC0}, |
| 384 | .umask = 0x1, |
| 385 | .event_name = "inst_retired.total_cycles", |
| 386 | }, |
| 387 | { |
| 388 | .event_code = {0xC0}, |
| 389 | .umask = 0x2, |
| 390 | .event_name = "inst_retired.x87", |
| 391 | }, |
| 392 | { |
| 393 | .event_code = {0x6C}, |
| 394 | .umask = 0x1, |
| 395 | .event_name = "io_transactions", |
| 396 | }, |
| 397 | { |
| 398 | .event_code = {0xAE}, |
| 399 | .umask = 0x1, |
| 400 | .event_name = "itlb_flush", |
| 401 | }, |
| 402 | { |
| 403 | .event_code = {0xC8}, |
| 404 | .umask = 0x20, |
| 405 | .event_name = "itlb_miss_retired", |
| 406 | }, |
| 407 | { |
| 408 | .event_code = {0x85}, |
| 409 | .umask = 0x1, |
| 410 | .event_name = "itlb_misses.any", |
| 411 | }, |
| 412 | { |
| 413 | .event_code = {0x85}, |
| 414 | .umask = 0x2, |
| 415 | .event_name = "itlb_misses.walk_completed", |
| 416 | }, |
| 417 | { |
| 418 | .event_code = {0x51}, |
| 419 | .umask = 0x4, |
| 420 | .event_name = "l1d.m_evict", |
| 421 | }, |
| 422 | { |
| 423 | .event_code = {0x51}, |
| 424 | .umask = 0x2, |
| 425 | .event_name = "l1d.m_repl", |
| 426 | }, |
| 427 | { |
| 428 | .event_code = {0x51}, |
| 429 | .umask = 0x8, |
| 430 | .event_name = "l1d.m_snoop_evict", |
| 431 | }, |
| 432 | { |
| 433 | .event_code = {0x51}, |
| 434 | .umask = 0x1, |
| 435 | .event_name = "l1d.repl", |
| 436 | }, |
| 437 | { |
| 438 | .event_code = {0x43}, |
| 439 | .umask = 0x1, |
| 440 | .event_name = "l1d_all_ref.any", |
| 441 | }, |
| 442 | { |
| 443 | .event_code = {0x43}, |
| 444 | .umask = 0x2, |
| 445 | .event_name = "l1d_all_ref.cacheable", |
| 446 | }, |
| 447 | { |
| 448 | .event_code = {0x40}, |
| 449 | .umask = 0x4, |
| 450 | .event_name = "l1d_cache_ld.e_state", |
| 451 | }, |
| 452 | { |
| 453 | .event_code = {0x40}, |
| 454 | .umask = 0x1, |
| 455 | .event_name = "l1d_cache_ld.i_state", |
| 456 | }, |
| 457 | { |
| 458 | .event_code = {0x40}, |
| 459 | .umask = 0x8, |
| 460 | .event_name = "l1d_cache_ld.m_state", |
| 461 | }, |
| 462 | { |
| 463 | .event_code = {0x40}, |
| 464 | .umask = 0xF, |
| 465 | .event_name = "l1d_cache_ld.mesi", |
| 466 | }, |
| 467 | { |
| 468 | .event_code = {0x40}, |
| 469 | .umask = 0x2, |
| 470 | .event_name = "l1d_cache_ld.s_state", |
| 471 | }, |
| 472 | { |
| 473 | .event_code = {0x42}, |
| 474 | .umask = 0x4, |
| 475 | .event_name = "l1d_cache_lock.e_state", |
| 476 | }, |
| 477 | { |
| 478 | .event_code = {0x42}, |
| 479 | .umask = 0x1, |
| 480 | .event_name = "l1d_cache_lock.hit", |
| 481 | }, |
| 482 | { |
| 483 | .event_code = {0x42}, |
| 484 | .umask = 0x8, |
| 485 | .event_name = "l1d_cache_lock.m_state", |
| 486 | }, |
| 487 | { |
| 488 | .event_code = {0x42}, |
| 489 | .umask = 0x2, |
| 490 | .event_name = "l1d_cache_lock.s_state", |
| 491 | }, |
| 492 | { |
| 493 | .event_code = {0x53}, |
| 494 | .umask = 0x1, |
| 495 | .event_name = "l1d_cache_lock_fb_hit", |
| 496 | }, |
| 497 | { |
| 498 | .event_code = {0x52}, |
| 499 | .umask = 0x1, |
| 500 | .event_name = "l1d_cache_prefetch_lock_fb_hit", |
| 501 | }, |
| 502 | { |
| 503 | .event_code = {0x41}, |
| 504 | .umask = 0x4, |
| 505 | .event_name = "l1d_cache_st.e_state", |
| 506 | }, |
| 507 | { |
| 508 | .event_code = {0x41}, |
| 509 | .umask = 0x8, |
| 510 | .event_name = "l1d_cache_st.m_state", |
| 511 | }, |
| 512 | { |
| 513 | .event_code = {0x41}, |
| 514 | .umask = 0x2, |
| 515 | .event_name = "l1d_cache_st.s_state", |
| 516 | }, |
| 517 | { |
| 518 | .event_code = {0x4E}, |
| 519 | .umask = 0x2, |
| 520 | .event_name = "l1d_prefetch.miss", |
| 521 | }, |
| 522 | { |
| 523 | .event_code = {0x4E}, |
| 524 | .umask = 0x1, |
| 525 | .event_name = "l1d_prefetch.requests", |
| 526 | }, |
| 527 | { |
| 528 | .event_code = {0x4E}, |
| 529 | .umask = 0x4, |
| 530 | .event_name = "l1d_prefetch.triggers", |
| 531 | }, |
| 532 | { |
| 533 | .event_code = {0x28}, |
| 534 | .umask = 0x4, |
| 535 | .event_name = "l1d_wb_l2.e_state", |
| 536 | }, |
| 537 | { |
| 538 | .event_code = {0x28}, |
| 539 | .umask = 0x1, |
| 540 | .event_name = "l1d_wb_l2.i_state", |
| 541 | }, |
| 542 | { |
| 543 | .event_code = {0x28}, |
| 544 | .umask = 0x8, |
| 545 | .event_name = "l1d_wb_l2.m_state", |
| 546 | }, |
| 547 | { |
| 548 | .event_code = {0x28}, |
| 549 | .umask = 0xF, |
| 550 | .event_name = "l1d_wb_l2.mesi", |
| 551 | }, |
| 552 | { |
| 553 | .event_code = {0x28}, |
| 554 | .umask = 0x2, |
| 555 | .event_name = "l1d_wb_l2.s_state", |
| 556 | }, |
| 557 | { |
| 558 | .event_code = {0x80}, |
| 559 | .umask = 0x4, |
| 560 | .event_name = "l1i.cycles_stalled", |
| 561 | }, |
| 562 | { |
| 563 | .event_code = {0x80}, |
| 564 | .umask = 0x1, |
| 565 | .event_name = "l1i.hits", |
| 566 | }, |
| 567 | { |
| 568 | .event_code = {0x80}, |
| 569 | .umask = 0x2, |
| 570 | .event_name = "l1i.misses", |
| 571 | }, |
| 572 | { |
| 573 | .event_code = {0x80}, |
| 574 | .umask = 0x3, |
| 575 | .event_name = "l1i.reads", |
| 576 | }, |
| 577 | { |
| 578 | .event_code = {0x26}, |
| 579 | .umask = 0xFF, |
| 580 | .event_name = "l2_data_rqsts.any", |
| 581 | }, |
| 582 | { |
| 583 | .event_code = {0x26}, |
| 584 | .umask = 0x4, |
| 585 | .event_name = "l2_data_rqsts.demand.e_state", |
| 586 | }, |
| 587 | { |
| 588 | .event_code = {0x26}, |
| 589 | .umask = 0x1, |
| 590 | .event_name = "l2_data_rqsts.demand.i_state", |
| 591 | }, |
| 592 | { |
| 593 | .event_code = {0x26}, |
| 594 | .umask = 0x8, |
| 595 | .event_name = "l2_data_rqsts.demand.m_state", |
| 596 | }, |
| 597 | { |
| 598 | .event_code = {0x26}, |
| 599 | .umask = 0xF, |
| 600 | .event_name = "l2_data_rqsts.demand.mesi", |
| 601 | }, |
| 602 | { |
| 603 | .event_code = {0x26}, |
| 604 | .umask = 0x2, |
| 605 | .event_name = "l2_data_rqsts.demand.s_state", |
| 606 | }, |
| 607 | { |
| 608 | .event_code = {0x26}, |
| 609 | .umask = 0x40, |
| 610 | .event_name = "l2_data_rqsts.prefetch.e_state", |
| 611 | }, |
| 612 | { |
| 613 | .event_code = {0x26}, |
| 614 | .umask = 0x10, |
| 615 | .event_name = "l2_data_rqsts.prefetch.i_state", |
| 616 | }, |
| 617 | { |
| 618 | .event_code = {0x26}, |
| 619 | .umask = 0x80, |
| 620 | .event_name = "l2_data_rqsts.prefetch.m_state", |
| 621 | }, |
| 622 | { |
| 623 | .event_code = {0x26}, |
| 624 | .umask = 0xF0, |
| 625 | .event_name = "l2_data_rqsts.prefetch.mesi", |
| 626 | }, |
| 627 | { |
| 628 | .event_code = {0x26}, |
| 629 | .umask = 0x20, |
| 630 | .event_name = "l2_data_rqsts.prefetch.s_state", |
| 631 | }, |
| 632 | { |
| 633 | .event_code = {0xF1}, |
| 634 | .umask = 0x7, |
| 635 | .event_name = "l2_lines_in.any", |
| 636 | }, |
| 637 | { |
| 638 | .event_code = {0xF1}, |
| 639 | .umask = 0x4, |
| 640 | .event_name = "l2_lines_in.e_state", |
| 641 | }, |
| 642 | { |
| 643 | .event_code = {0xF1}, |
| 644 | .umask = 0x2, |
| 645 | .event_name = "l2_lines_in.s_state", |
| 646 | }, |
| 647 | { |
| 648 | .event_code = {0xF2}, |
| 649 | .umask = 0xF, |
| 650 | .event_name = "l2_lines_out.any", |
| 651 | }, |
| 652 | { |
| 653 | .event_code = {0xF2}, |
| 654 | .umask = 0x1, |
| 655 | .event_name = "l2_lines_out.demand_clean", |
| 656 | }, |
| 657 | { |
| 658 | .event_code = {0xF2}, |
| 659 | .umask = 0x2, |
| 660 | .event_name = "l2_lines_out.demand_dirty", |
| 661 | }, |
| 662 | { |
| 663 | .event_code = {0xF2}, |
| 664 | .umask = 0x4, |
| 665 | .event_name = "l2_lines_out.prefetch_clean", |
| 666 | }, |
| 667 | { |
| 668 | .event_code = {0xF2}, |
| 669 | .umask = 0x8, |
| 670 | .event_name = "l2_lines_out.prefetch_dirty", |
| 671 | }, |
| 672 | { |
| 673 | .event_code = {0x24}, |
| 674 | .umask = 0x10, |
| 675 | .event_name = "l2_rqsts.ifetch_hit", |
| 676 | }, |
| 677 | { |
| 678 | .event_code = {0x24}, |
| 679 | .umask = 0x20, |
| 680 | .event_name = "l2_rqsts.ifetch_miss", |
| 681 | }, |
| 682 | { |
| 683 | .event_code = {0x24}, |
| 684 | .umask = 0x30, |
| 685 | .event_name = "l2_rqsts.ifetches", |
| 686 | }, |
| 687 | { |
| 688 | .event_code = {0x24}, |
| 689 | .umask = 0x1, |
| 690 | .event_name = "l2_rqsts.ld_hit", |
| 691 | }, |
| 692 | { |
| 693 | .event_code = {0x24}, |
| 694 | .umask = 0x2, |
| 695 | .event_name = "l2_rqsts.ld_miss", |
| 696 | }, |
| 697 | { |
| 698 | .event_code = {0x24}, |
| 699 | .umask = 0x3, |
| 700 | .event_name = "l2_rqsts.loads", |
| 701 | }, |
| 702 | { |
| 703 | .event_code = {0x24}, |
| 704 | .umask = 0xAA, |
| 705 | .event_name = "l2_rqsts.miss", |
| 706 | }, |
| 707 | { |
| 708 | .event_code = {0x24}, |
| 709 | .umask = 0x40, |
| 710 | .event_name = "l2_rqsts.prefetch_hit", |
| 711 | }, |
| 712 | { |
| 713 | .event_code = {0x24}, |
| 714 | .umask = 0x80, |
| 715 | .event_name = "l2_rqsts.prefetch_miss", |
| 716 | }, |
| 717 | { |
| 718 | .event_code = {0x24}, |
| 719 | .umask = 0xC0, |
| 720 | .event_name = "l2_rqsts.prefetches", |
| 721 | }, |
| 722 | { |
| 723 | .event_code = {0x24}, |
| 724 | .umask = 0xFF, |
| 725 | .event_name = "l2_rqsts.references", |
| 726 | }, |
| 727 | { |
| 728 | .event_code = {0x24}, |
| 729 | .umask = 0x4, |
| 730 | .event_name = "l2_rqsts.rfo_hit", |
| 731 | }, |
| 732 | { |
| 733 | .event_code = {0x24}, |
| 734 | .umask = 0x8, |
| 735 | .event_name = "l2_rqsts.rfo_miss", |
| 736 | }, |
| 737 | { |
| 738 | .event_code = {0x24}, |
| 739 | .umask = 0xC, |
| 740 | .event_name = "l2_rqsts.rfos", |
| 741 | }, |
| 742 | { |
| 743 | .event_code = {0xF0}, |
| 744 | .umask = 0x80, |
| 745 | .event_name = "l2_transactions.any", |
| 746 | }, |
| 747 | { |
| 748 | .event_code = {0xF0}, |
| 749 | .umask = 0x20, |
| 750 | .event_name = "l2_transactions.fill", |
| 751 | }, |
| 752 | { |
| 753 | .event_code = {0xF0}, |
| 754 | .umask = 0x4, |
| 755 | .event_name = "l2_transactions.ifetch", |
| 756 | }, |
| 757 | { |
| 758 | .event_code = {0xF0}, |
| 759 | .umask = 0x10, |
| 760 | .event_name = "l2_transactions.l1d_wb", |
| 761 | }, |
| 762 | { |
| 763 | .event_code = {0xF0}, |
| 764 | .umask = 0x1, |
| 765 | .event_name = "l2_transactions.load", |
| 766 | }, |
| 767 | { |
| 768 | .event_code = {0xF0}, |
| 769 | .umask = 0x8, |
| 770 | .event_name = "l2_transactions.prefetch", |
| 771 | }, |
| 772 | { |
| 773 | .event_code = {0xF0}, |
| 774 | .umask = 0x2, |
| 775 | .event_name = "l2_transactions.rfo", |
| 776 | }, |
| 777 | { |
| 778 | .event_code = {0xF0}, |
| 779 | .umask = 0x40, |
| 780 | .event_name = "l2_transactions.wb", |
| 781 | }, |
| 782 | { |
| 783 | .event_code = {0x27}, |
| 784 | .umask = 0x40, |
| 785 | .event_name = "l2_write.lock.e_state", |
| 786 | }, |
| 787 | { |
| 788 | .event_code = {0x27}, |
| 789 | .umask = 0xE0, |
| 790 | .event_name = "l2_write.lock.hit", |
| 791 | }, |
| 792 | { |
| 793 | .event_code = {0x27}, |
| 794 | .umask = 0x10, |
| 795 | .event_name = "l2_write.lock.i_state", |
| 796 | }, |
| 797 | { |
| 798 | .event_code = {0x27}, |
| 799 | .umask = 0x80, |
| 800 | .event_name = "l2_write.lock.m_state", |
| 801 | }, |
| 802 | { |
| 803 | .event_code = {0x27}, |
| 804 | .umask = 0xF0, |
| 805 | .event_name = "l2_write.lock.mesi", |
| 806 | }, |
| 807 | { |
| 808 | .event_code = {0x27}, |
| 809 | .umask = 0x20, |
| 810 | .event_name = "l2_write.lock.s_state", |
| 811 | }, |
| 812 | { |
| 813 | .event_code = {0x27}, |
| 814 | .umask = 0xE, |
| 815 | .event_name = "l2_write.rfo.hit", |
| 816 | }, |
| 817 | { |
| 818 | .event_code = {0x27}, |
| 819 | .umask = 0x1, |
| 820 | .event_name = "l2_write.rfo.i_state", |
| 821 | }, |
| 822 | { |
| 823 | .event_code = {0x27}, |
| 824 | .umask = 0x8, |
| 825 | .event_name = "l2_write.rfo.m_state", |
| 826 | }, |
| 827 | { |
| 828 | .event_code = {0x27}, |
| 829 | .umask = 0xF, |
| 830 | .event_name = "l2_write.rfo.mesi", |
| 831 | }, |
| 832 | { |
| 833 | .event_code = {0x27}, |
| 834 | .umask = 0x2, |
| 835 | .event_name = "l2_write.rfo.s_state", |
| 836 | }, |
| 837 | { |
| 838 | .event_code = {0x82}, |
| 839 | .umask = 0x1, |
| 840 | .event_name = "large_itlb.hit", |
| 841 | }, |
| 842 | { |
| 843 | .event_code = {0x13}, |
| 844 | .umask = 0x7, |
| 845 | .event_name = "load_dispatch.any", |
| 846 | }, |
| 847 | { |
| 848 | .event_code = {0x13}, |
| 849 | .umask = 0x4, |
| 850 | .event_name = "load_dispatch.mob", |
| 851 | }, |
| 852 | { |
| 853 | .event_code = {0x13}, |
| 854 | .umask = 0x1, |
| 855 | .event_name = "load_dispatch.rs", |
| 856 | }, |
| 857 | { |
| 858 | .event_code = {0x13}, |
| 859 | .umask = 0x2, |
| 860 | .event_name = "load_dispatch.rs_delayed", |
| 861 | }, |
| 862 | { |
| 863 | .event_code = {0x4C}, |
| 864 | .umask = 0x1, |
| 865 | .event_name = "load_hit_pre", |
| 866 | }, |
| 867 | { |
| 868 | .event_code = {0x2E}, |
| 869 | .umask = 0x41, |
| 870 | .event_name = "longest_lat_cache.miss", |
| 871 | }, |
| 872 | { |
| 873 | .event_code = {0x2E}, |
| 874 | .umask = 0x4F, |
| 875 | .event_name = "longest_lat_cache.reference", |
| 876 | }, |
| 877 | { |
| 878 | .event_code = {0xA8}, |
| 879 | .umask = 0x1, |
| 880 | .event_name = "lsd.active", |
| 881 | }, |
| 882 | { |
| 883 | .event_code = {0xA8}, |
| 884 | .umask = 0x1, |
| 885 | .event_name = "lsd.inactive", |
| 886 | }, |
| 887 | { |
| 888 | .event_code = {0x20}, |
| 889 | .umask = 0x1, |
| 890 | .event_name = "lsd_overflow", |
| 891 | }, |
| 892 | { |
| 893 | .event_code = {0xC3}, |
| 894 | .umask = 0x1, |
| 895 | .event_name = "machine_clears.cycles", |
| 896 | }, |
| 897 | { |
| 898 | .event_code = {0xC3}, |
| 899 | .umask = 0x2, |
| 900 | .event_name = "machine_clears.mem_order", |
| 901 | }, |
| 902 | { |
| 903 | .event_code = {0xC3}, |
| 904 | .umask = 0x4, |
| 905 | .event_name = "machine_clears.smc", |
| 906 | }, |
| 907 | { |
| 908 | .event_code = {0xD0}, |
| 909 | .umask = 0x1, |
| 910 | .event_name = "macro_insts.decoded", |
| 911 | }, |
| 912 | { |
| 913 | .event_code = {0xA6}, |
| 914 | .umask = 0x1, |
| 915 | .event_name = "macro_insts.fusions_decoded", |
| 916 | }, |
| 917 | { |
| 918 | .event_code = {0xB}, |
| 919 | .umask = 0x1, |
| 920 | .event_name = "mem_inst_retired.loads", |
| 921 | }, |
| 922 | { |
| 923 | .event_code = {0xB}, |
| 924 | .umask = 0x2, |
| 925 | .event_name = "mem_inst_retired.stores", |
| 926 | }, |
| 927 | { |
| 928 | .event_code = {0xCB}, |
| 929 | .umask = 0x80, |
| 930 | .event_name = "mem_load_retired.dtlb_miss", |
| 931 | }, |
| 932 | { |
| 933 | .event_code = {0xCB}, |
| 934 | .umask = 0x40, |
| 935 | .event_name = "mem_load_retired.hit_lfb", |
| 936 | }, |
| 937 | { |
| 938 | .event_code = {0xCB}, |
| 939 | .umask = 0x1, |
| 940 | .event_name = "mem_load_retired.l1d_hit", |
| 941 | }, |
| 942 | { |
| 943 | .event_code = {0xCB}, |
| 944 | .umask = 0x2, |
| 945 | .event_name = "mem_load_retired.l2_hit", |
| 946 | }, |
| 947 | { |
| 948 | .event_code = {0xCB}, |
| 949 | .umask = 0x10, |
| 950 | .event_name = "mem_load_retired.llc_miss", |
| 951 | }, |
| 952 | { |
| 953 | .event_code = {0xCB}, |
| 954 | .umask = 0x4, |
| 955 | .event_name = "mem_load_retired.llc_unshared_hit", |
| 956 | }, |
| 957 | { |
| 958 | .event_code = {0xCB}, |
| 959 | .umask = 0x8, |
| 960 | .event_name = "mem_load_retired.other_core_l2_hit_hitm", |
| 961 | }, |
| 962 | { |
| 963 | .event_code = {0xC}, |
| 964 | .umask = 0x1, |
| 965 | .event_name = "mem_store_retired.dtlb_miss", |
| 966 | }, |
| 967 | { |
| 968 | .event_code = {0xF}, |
| 969 | .umask = 0x20, |
| 970 | .event_name = "mem_uncore_retired.local_dram", |
| 971 | }, |
| 972 | { |
| 973 | .event_code = {0xF}, |
| 974 | .umask = 0x2, |
| 975 | .event_name = "mem_uncore_retired.other_core_l2_hitm", |
| 976 | }, |
| 977 | { |
| 978 | .event_code = {0xF}, |
| 979 | .umask = 0x8, |
| 980 | .event_name = "mem_uncore_retired.remote_cache_local_home_hit", |
| 981 | }, |
| 982 | { |
| 983 | .event_code = {0xF}, |
| 984 | .umask = 0x10, |
| 985 | .event_name = "mem_uncore_retired.remote_dram", |
| 986 | }, |
| 987 | { |
| 988 | .event_code = {0xF}, |
| 989 | .umask = 0x80, |
| 990 | .event_name = "mem_uncore_retired.uncacheable", |
| 991 | }, |
| 992 | { |
| 993 | .event_code = {0xB0}, |
| 994 | .umask = 0x40, |
| 995 | .event_name = "offcore_requests.l1d_writeback", |
| 996 | }, |
| 997 | { |
| 998 | .event_code = {0xB2}, |
| 999 | .umask = 0x1, |
| 1000 | .event_name = "offcore_requests_sq_full", |
| 1001 | }, |
| 1002 | { |
| 1003 | .event_code = {0x7}, |
| 1004 | .umask = 0x1, |
| 1005 | .event_name = "partial_address_alias", |
| 1006 | }, |
| 1007 | { |
| 1008 | .event_code = {0xD2}, |
| 1009 | .umask = 0xF, |
| 1010 | .event_name = "rat_stalls.any", |
| 1011 | }, |
| 1012 | { |
| 1013 | .event_code = {0xD2}, |
| 1014 | .umask = 0x1, |
| 1015 | .event_name = "rat_stalls.flags", |
| 1016 | }, |
| 1017 | { |
| 1018 | .event_code = {0xD2}, |
| 1019 | .umask = 0x2, |
| 1020 | .event_name = "rat_stalls.registers", |
| 1021 | }, |
| 1022 | { |
| 1023 | .event_code = {0xD2}, |
| 1024 | .umask = 0x4, |
| 1025 | .event_name = "rat_stalls.rob_read_port", |
| 1026 | }, |
| 1027 | { |
| 1028 | .event_code = {0xD2}, |
| 1029 | .umask = 0x8, |
| 1030 | .event_name = "rat_stalls.scoreboard", |
| 1031 | }, |
| 1032 | { |
| 1033 | .event_code = {0xA2}, |
| 1034 | .umask = 0x1, |
| 1035 | .event_name = "resource_stalls.any", |
| 1036 | }, |
| 1037 | { |
| 1038 | .event_code = {0xA2}, |
| 1039 | .umask = 0x20, |
| 1040 | .event_name = "resource_stalls.fpcw", |
| 1041 | }, |
| 1042 | { |
| 1043 | .event_code = {0xA2}, |
| 1044 | .umask = 0x2, |
| 1045 | .event_name = "resource_stalls.load", |
| 1046 | }, |
| 1047 | { |
| 1048 | .event_code = {0xA2}, |
| 1049 | .umask = 0x40, |
| 1050 | .event_name = "resource_stalls.mxcsr", |
| 1051 | }, |
| 1052 | { |
| 1053 | .event_code = {0xA2}, |
| 1054 | .umask = 0x80, |
| 1055 | .event_name = "resource_stalls.other", |
| 1056 | }, |
| 1057 | { |
| 1058 | .event_code = {0xA2}, |
| 1059 | .umask = 0x10, |
| 1060 | .event_name = "resource_stalls.rob_full", |
| 1061 | }, |
| 1062 | { |
| 1063 | .event_code = {0xA2}, |
| 1064 | .umask = 0x4, |
| 1065 | .event_name = "resource_stalls.rs_full", |
| 1066 | }, |
| 1067 | { |
| 1068 | .event_code = {0xA2}, |
| 1069 | .umask = 0x8, |
| 1070 | .event_name = "resource_stalls.store", |
| 1071 | }, |
| 1072 | { |
| 1073 | .event_code = {0x4}, |
| 1074 | .umask = 0x7, |
| 1075 | .event_name = "sb_drain.any", |
| 1076 | }, |
| 1077 | { |
| 1078 | .event_code = {0xD4}, |
| 1079 | .umask = 0x1, |
| 1080 | .event_name = "seg_rename_stalls", |
| 1081 | }, |
| 1082 | { |
| 1083 | .event_code = {0x12}, |
| 1084 | .umask = 0x4, |
| 1085 | .event_name = "simd_int_128.pack", |
| 1086 | }, |
| 1087 | { |
| 1088 | .event_code = {0x12}, |
| 1089 | .umask = 0x20, |
| 1090 | .event_name = "simd_int_128.packed_arith", |
| 1091 | }, |
| 1092 | { |
| 1093 | .event_code = {0x12}, |
| 1094 | .umask = 0x10, |
| 1095 | .event_name = "simd_int_128.packed_logical", |
| 1096 | }, |
| 1097 | { |
| 1098 | .event_code = {0x12}, |
| 1099 | .umask = 0x1, |
| 1100 | .event_name = "simd_int_128.packed_mpy", |
| 1101 | }, |
| 1102 | { |
| 1103 | .event_code = {0x12}, |
| 1104 | .umask = 0x2, |
| 1105 | .event_name = "simd_int_128.packed_shift", |
| 1106 | }, |
| 1107 | { |
| 1108 | .event_code = {0x12}, |
| 1109 | .umask = 0x40, |
| 1110 | .event_name = "simd_int_128.shuffle_move", |
| 1111 | }, |
| 1112 | { |
| 1113 | .event_code = {0x12}, |
| 1114 | .umask = 0x8, |
| 1115 | .event_name = "simd_int_128.unpack", |
| 1116 | }, |
| 1117 | { |
| 1118 | .event_code = {0xFD}, |
| 1119 | .umask = 0x4, |
| 1120 | .event_name = "simd_int_64.pack", |
| 1121 | }, |
| 1122 | { |
| 1123 | .event_code = {0xFD}, |
| 1124 | .umask = 0x20, |
| 1125 | .event_name = "simd_int_64.packed_arith", |
| 1126 | }, |
| 1127 | { |
| 1128 | .event_code = {0xFD}, |
| 1129 | .umask = 0x10, |
| 1130 | .event_name = "simd_int_64.packed_logical", |
| 1131 | }, |
| 1132 | { |
| 1133 | .event_code = {0xFD}, |
| 1134 | .umask = 0x1, |
| 1135 | .event_name = "simd_int_64.packed_mpy", |
| 1136 | }, |
| 1137 | { |
| 1138 | .event_code = {0xFD}, |
| 1139 | .umask = 0x2, |
| 1140 | .event_name = "simd_int_64.packed_shift", |
| 1141 | }, |
| 1142 | { |
| 1143 | .event_code = {0xFD}, |
| 1144 | .umask = 0x40, |
| 1145 | .event_name = "simd_int_64.shuffle_move", |
| 1146 | }, |
| 1147 | { |
| 1148 | .event_code = {0xFD}, |
| 1149 | .umask = 0x8, |
| 1150 | .event_name = "simd_int_64.unpack", |
| 1151 | }, |
| 1152 | { |
| 1153 | .event_code = {0xB8}, |
| 1154 | .umask = 0x1, |
| 1155 | .event_name = "snoop_response.hit", |
| 1156 | }, |
| 1157 | { |
| 1158 | .event_code = {0xB8}, |
| 1159 | .umask = 0x2, |
| 1160 | .event_name = "snoop_response.hite", |
| 1161 | }, |
| 1162 | { |
| 1163 | .event_code = {0xB8}, |
| 1164 | .umask = 0x4, |
| 1165 | .event_name = "snoop_response.hitm", |
| 1166 | }, |
| 1167 | { |
| 1168 | .event_code = {0xF6}, |
| 1169 | .umask = 0x1, |
| 1170 | .event_name = "sq_full_stall_cycles", |
| 1171 | }, |
| 1172 | { |
| 1173 | .event_code = {0xF4}, |
| 1174 | .umask = 0x10, |
| 1175 | .event_name = "sq_misc.split_lock", |
| 1176 | }, |
| 1177 | { |
| 1178 | .event_code = {0xC7}, |
| 1179 | .umask = 0x4, |
| 1180 | .event_name = "ssex_uops_retired.packed_double", |
| 1181 | }, |
| 1182 | { |
| 1183 | .event_code = {0xC7}, |
| 1184 | .umask = 0x1, |
| 1185 | .event_name = "ssex_uops_retired.packed_single", |
| 1186 | }, |
| 1187 | { |
| 1188 | .event_code = {0xC7}, |
| 1189 | .umask = 0x8, |
| 1190 | .event_name = "ssex_uops_retired.scalar_double", |
| 1191 | }, |
| 1192 | { |
| 1193 | .event_code = {0xC7}, |
| 1194 | .umask = 0x2, |
| 1195 | .event_name = "ssex_uops_retired.scalar_single", |
| 1196 | }, |
| 1197 | { |
| 1198 | .event_code = {0xC7}, |
| 1199 | .umask = 0x10, |
| 1200 | .event_name = "ssex_uops_retired.vector_integer", |
| 1201 | }, |
| 1202 | { |
| 1203 | .event_code = {0x6}, |
| 1204 | .umask = 0x4, |
| 1205 | .event_name = "store_blocks.at_ret", |
| 1206 | }, |
| 1207 | { |
| 1208 | .event_code = {0x6}, |
| 1209 | .umask = 0x8, |
| 1210 | .event_name = "store_blocks.l1d_block", |
| 1211 | }, |
| 1212 | { |
| 1213 | .event_code = {0x19}, |
| 1214 | .umask = 0x1, |
| 1215 | .event_name = "two_uop_insts_decoded", |
| 1216 | }, |
| 1217 | { |
| 1218 | .event_code = {0xDB}, |
| 1219 | .umask = 0x1, |
| 1220 | .event_name = "uop_unfusion", |
| 1221 | }, |
| 1222 | { |
| 1223 | .event_code = {0xD1}, |
| 1224 | .umask = 0x4, |
| 1225 | .event_name = "uops_decoded.esp_folding", |
| 1226 | }, |
| 1227 | { |
| 1228 | .event_code = {0xD1}, |
| 1229 | .umask = 0x8, |
| 1230 | .event_name = "uops_decoded.esp_sync", |
| 1231 | }, |
| 1232 | { |
| 1233 | .event_code = {0xD1}, |
| 1234 | .umask = 0x2, |
| 1235 | .event_name = "uops_decoded.ms_cycles_active", |
| 1236 | }, |
| 1237 | { |
| 1238 | .event_code = {0xD1}, |
| 1239 | .umask = 0x1, |
| 1240 | .event_name = "uops_decoded.stall_cycles", |
| 1241 | }, |
| 1242 | { |
| 1243 | .event_code = {0xB1}, |
| 1244 | .umask = 0x3F, |
| 1245 | .event_name = "uops_executed.core_active_cycles", |
| 1246 | }, |
| 1247 | { |
| 1248 | .event_code = {0xB1}, |
| 1249 | .umask = 0x1F, |
| 1250 | .event_name = "uops_executed.core_active_cycles_no_port5", |
| 1251 | }, |
| 1252 | { |
| 1253 | .event_code = {0xB1}, |
| 1254 | .umask = 0x3F, |
| 1255 | .event_name = "uops_executed.core_stall_count", |
| 1256 | }, |
| 1257 | { |
| 1258 | .event_code = {0xB1}, |
| 1259 | .umask = 0x1F, |
| 1260 | .event_name = "uops_executed.core_stall_count_no_port5", |
| 1261 | }, |
| 1262 | { |
| 1263 | .event_code = {0xB1}, |
| 1264 | .umask = 0x3F, |
| 1265 | .event_name = "uops_executed.core_stall_cycles", |
| 1266 | }, |
| 1267 | { |
| 1268 | .event_code = {0xB1}, |
| 1269 | .umask = 0x1F, |
| 1270 | .event_name = "uops_executed.core_stall_cycles_no_port5", |
| 1271 | }, |
| 1272 | { |
| 1273 | .event_code = {0xB1}, |
| 1274 | .umask = 0x1, |
| 1275 | .event_name = "uops_executed.port0", |
| 1276 | }, |
| 1277 | { |
| 1278 | .event_code = {0xB1}, |
| 1279 | .umask = 0x40, |
| 1280 | .event_name = "uops_executed.port015", |
| 1281 | }, |
| 1282 | { |
| 1283 | .event_code = {0xB1}, |
| 1284 | .umask = 0x40, |
| 1285 | .event_name = "uops_executed.port015_stall_cycles", |
| 1286 | }, |
| 1287 | { |
| 1288 | .event_code = {0xB1}, |
| 1289 | .umask = 0x2, |
| 1290 | .event_name = "uops_executed.port1", |
| 1291 | }, |
| 1292 | { |
| 1293 | .event_code = {0xB1}, |
| 1294 | .umask = 0x4, |
| 1295 | .event_name = "uops_executed.port2_core", |
| 1296 | }, |
| 1297 | { |
| 1298 | .event_code = {0xB1}, |
| 1299 | .umask = 0x80, |
| 1300 | .event_name = "uops_executed.port234_core", |
| 1301 | }, |
| 1302 | { |
| 1303 | .event_code = {0xB1}, |
| 1304 | .umask = 0x8, |
| 1305 | .event_name = "uops_executed.port3_core", |
| 1306 | }, |
| 1307 | { |
| 1308 | .event_code = {0xB1}, |
| 1309 | .umask = 0x10, |
| 1310 | .event_name = "uops_executed.port4_core", |
| 1311 | }, |
| 1312 | { |
| 1313 | .event_code = {0xB1}, |
| 1314 | .umask = 0x20, |
| 1315 | .event_name = "uops_executed.port5", |
| 1316 | }, |
| 1317 | { |
| 1318 | .event_code = {0xE}, |
| 1319 | .umask = 0x1, |
| 1320 | .event_name = "uops_issued.any", |
| 1321 | }, |
| 1322 | { |
| 1323 | .event_code = {0xE}, |
| 1324 | .umask = 0x1, |
| 1325 | .event_name = "uops_issued.core_stall_cycles", |
| 1326 | }, |
| 1327 | { |
| 1328 | .event_code = {0xE}, |
| 1329 | .umask = 0x1, |
| 1330 | .event_name = "uops_issued.cycles_all_threads", |
| 1331 | }, |
| 1332 | { |
| 1333 | .event_code = {0xE}, |
| 1334 | .umask = 0x2, |
| 1335 | .event_name = "uops_issued.fused", |
| 1336 | }, |
| 1337 | { |
| 1338 | .event_code = {0xE}, |
| 1339 | .umask = 0x1, |
| 1340 | .event_name = "uops_issued.stall_cycles", |
| 1341 | }, |
| 1342 | { |
| 1343 | .event_code = {0xC2}, |
| 1344 | .umask = 0x1, |
| 1345 | .event_name = "uops_retired.active_cycles", |
| 1346 | }, |
| 1347 | { |
| 1348 | .event_code = {0xC2}, |
| 1349 | .umask = 0x1, |
| 1350 | .event_name = "uops_retired.any", |
| 1351 | }, |
| 1352 | { |
| 1353 | .event_code = {0xC2}, |
| 1354 | .umask = 0x4, |
| 1355 | .event_name = "uops_retired.macro_fused", |
| 1356 | }, |
| 1357 | { |
| 1358 | .event_code = {0xC2}, |
| 1359 | .umask = 0x2, |
| 1360 | .event_name = "uops_retired.retire_slots", |
| 1361 | }, |
| 1362 | { |
| 1363 | .event_code = {0xC2}, |
| 1364 | .umask = 0x1, |
| 1365 | .event_name = "uops_retired.stall_cycles", |
| 1366 | }, |
| 1367 | { |
| 1368 | .event_code = {0xC2}, |
| 1369 | .umask = 0x1, |
| 1370 | .event_name = "uops_retired.total_cycles", |
| 1371 | }, |
| 1372 | { |
| 1373 | .event_code = {0xC0}, |
| 1374 | .umask = 0x1, |
| 1375 | .event_name = "inst_retired.total_cycles_ps", |
| 1376 | }, |
| 1377 | { |
| 1378 | .event_name = 0, |
| 1379 | }, |
| 1380 | }; |
| 1381 | |
| 1382 | PERFMON_REGISTER_INTEL_PMC (cpu_model_table, event_table); |
| 1383 | |