| Damjan Marion | 47d165e | 2019-01-28 13:27:31 +0100 | [diff] [blame] | 1 | |
| 2 | #include <perfmon/perfmon_intel.h> |
| 3 | |
| 4 | static perfmon_intel_pmc_cpu_model_t cpu_model_table[] = { |
| 5 | {0x2A, 0x00, 0}, |
| 6 | |
| 7 | }; |
| 8 | |
| 9 | static perfmon_intel_pmc_event_t event_table[] = { |
| 10 | { |
| 11 | .event_code = {0x00}, |
| 12 | .umask = 0x03, |
| 13 | .event_name = "cpu_clk_unhalted.ref_tsc", |
| 14 | }, |
| 15 | { |
| 16 | .event_code = {0x00}, |
| 17 | .umask = 0x01, |
| 18 | .event_name = "inst_retired.any", |
| 19 | }, |
| 20 | { |
| 21 | .event_code = {0x00}, |
| 22 | .umask = 0x02, |
| 23 | .event_name = "cpu_clk_unhalted.thread", |
| 24 | }, |
| 25 | { |
| 26 | .event_code = {0x00}, |
| 27 | .umask = 0x02, |
| 28 | .event_name = "cpu_clk_unhalted.thread_any", |
| 29 | }, |
| 30 | { |
| 31 | .event_code = {0x03}, |
| 32 | .umask = 0x01, |
| 33 | .event_name = "ld_blocks.data_unknown", |
| 34 | }, |
| 35 | { |
| 36 | .event_code = {0x03}, |
| 37 | .umask = 0x02, |
| 38 | .event_name = "ld_blocks.store_forward", |
| 39 | }, |
| 40 | { |
| 41 | .event_code = {0x03}, |
| 42 | .umask = 0x08, |
| 43 | .event_name = "ld_blocks.no_sr", |
| 44 | }, |
| 45 | { |
| 46 | .event_code = {0x03}, |
| 47 | .umask = 0x10, |
| 48 | .event_name = "ld_blocks.all_block", |
| 49 | }, |
| 50 | { |
| 51 | .event_code = {0x05}, |
| 52 | .umask = 0x01, |
| 53 | .event_name = "misalign_mem_ref.loads", |
| 54 | }, |
| 55 | { |
| 56 | .event_code = {0x05}, |
| 57 | .umask = 0x02, |
| 58 | .event_name = "misalign_mem_ref.stores", |
| 59 | }, |
| 60 | { |
| 61 | .event_code = {0x07}, |
| 62 | .umask = 0x01, |
| 63 | .event_name = "ld_blocks_partial.address_alias", |
| 64 | }, |
| 65 | { |
| 66 | .event_code = {0x07}, |
| 67 | .umask = 0x08, |
| 68 | .event_name = "ld_blocks_partial.all_sta_block", |
| 69 | }, |
| 70 | { |
| 71 | .event_code = {0x08}, |
| 72 | .umask = 0x01, |
| 73 | .event_name = "dtlb_load_misses.miss_causes_a_walk", |
| 74 | }, |
| 75 | { |
| 76 | .event_code = {0x08}, |
| 77 | .umask = 0x02, |
| 78 | .event_name = "dtlb_load_misses.walk_completed", |
| 79 | }, |
| 80 | { |
| 81 | .event_code = {0x08}, |
| 82 | .umask = 0x04, |
| 83 | .event_name = "dtlb_load_misses.walk_duration", |
| 84 | }, |
| 85 | { |
| 86 | .event_code = {0x08}, |
| 87 | .umask = 0x10, |
| 88 | .event_name = "dtlb_load_misses.stlb_hit", |
| 89 | }, |
| 90 | { |
| 91 | .event_code = {0x0D}, |
| 92 | .umask = 0x03, |
| 93 | .event_name = "int_misc.recovery_cycles", |
| 94 | }, |
| 95 | { |
| 96 | .event_code = {0x0D}, |
| 97 | .umask = 0x03, |
| 98 | .event_name = "int_misc.recovery_stalls_count", |
| 99 | }, |
| 100 | { |
| 101 | .event_code = {0x0D}, |
| 102 | .umask = 0x03, |
| 103 | .event_name = "int_misc.recovery_cycles_any", |
| 104 | }, |
| 105 | { |
| 106 | .event_code = {0x0D}, |
| 107 | .umask = 0x40, |
| 108 | .event_name = "int_misc.rat_stall_cycles", |
| 109 | }, |
| 110 | { |
| 111 | .event_code = {0x0E}, |
| 112 | .umask = 0x01, |
| 113 | .event_name = "uops_issued.any", |
| 114 | }, |
| 115 | { |
| 116 | .event_code = {0x0E}, |
| 117 | .umask = 0x01, |
| 118 | .event_name = "uops_issued.stall_cycles", |
| 119 | }, |
| 120 | { |
| 121 | .event_code = {0x0E}, |
| 122 | .umask = 0x01, |
| 123 | .event_name = "uops_issued.core_stall_cycles", |
| 124 | }, |
| 125 | { |
| 126 | .event_code = {0x10}, |
| 127 | .umask = 0x01, |
| 128 | .event_name = "fp_comp_ops_exe.x87", |
| 129 | }, |
| 130 | { |
| 131 | .event_code = {0x10}, |
| 132 | .umask = 0x10, |
| 133 | .event_name = "fp_comp_ops_exe.sse_packed_double", |
| 134 | }, |
| 135 | { |
| 136 | .event_code = {0x10}, |
| 137 | .umask = 0x20, |
| 138 | .event_name = "fp_comp_ops_exe.sse_scalar_single", |
| 139 | }, |
| 140 | { |
| 141 | .event_code = {0x10}, |
| 142 | .umask = 0x40, |
| 143 | .event_name = "fp_comp_ops_exe.sse_packed_single", |
| 144 | }, |
| 145 | { |
| 146 | .event_code = {0x10}, |
| 147 | .umask = 0x80, |
| 148 | .event_name = "fp_comp_ops_exe.sse_scalar_double", |
| 149 | }, |
| 150 | { |
| 151 | .event_code = {0x11}, |
| 152 | .umask = 0x01, |
| 153 | .event_name = "simd_fp_256.packed_single", |
| 154 | }, |
| 155 | { |
| 156 | .event_code = {0x11}, |
| 157 | .umask = 0x02, |
| 158 | .event_name = "simd_fp_256.packed_double", |
| 159 | }, |
| 160 | { |
| 161 | .event_code = {0x14}, |
| 162 | .umask = 0x01, |
| 163 | .event_name = "arith.fpu_div_active", |
| 164 | }, |
| 165 | { |
| 166 | .event_code = {0x14}, |
| 167 | .umask = 0x01, |
| 168 | .event_name = "arith.fpu_div", |
| 169 | }, |
| 170 | { |
| 171 | .event_code = {0x17}, |
| 172 | .umask = 0x01, |
| 173 | .event_name = "insts_written_to_iq.insts", |
| 174 | }, |
| 175 | { |
| 176 | .event_code = {0x24}, |
| 177 | .umask = 0x01, |
| 178 | .event_name = "l2_rqsts.demand_data_rd_hit", |
| 179 | }, |
| 180 | { |
| 181 | .event_code = {0x24}, |
| 182 | .umask = 0x03, |
| 183 | .event_name = "l2_rqsts.all_demand_data_rd", |
| 184 | }, |
| 185 | { |
| 186 | .event_code = {0x24}, |
| 187 | .umask = 0x04, |
| 188 | .event_name = "l2_rqsts.rfo_hit", |
| 189 | }, |
| 190 | { |
| 191 | .event_code = {0x24}, |
| 192 | .umask = 0x08, |
| 193 | .event_name = "l2_rqsts.rfo_miss", |
| 194 | }, |
| 195 | { |
| 196 | .event_code = {0x24}, |
| 197 | .umask = 0x0C, |
| 198 | .event_name = "l2_rqsts.all_rfo", |
| 199 | }, |
| 200 | { |
| 201 | .event_code = {0x24}, |
| 202 | .umask = 0x10, |
| 203 | .event_name = "l2_rqsts.code_rd_hit", |
| 204 | }, |
| 205 | { |
| 206 | .event_code = {0x24}, |
| 207 | .umask = 0x20, |
| 208 | .event_name = "l2_rqsts.code_rd_miss", |
| 209 | }, |
| 210 | { |
| 211 | .event_code = {0x24}, |
| 212 | .umask = 0x30, |
| 213 | .event_name = "l2_rqsts.all_code_rd", |
| 214 | }, |
| 215 | { |
| 216 | .event_code = {0x24}, |
| 217 | .umask = 0x40, |
| 218 | .event_name = "l2_rqsts.pf_hit", |
| 219 | }, |
| 220 | { |
| 221 | .event_code = {0x24}, |
| 222 | .umask = 0x80, |
| 223 | .event_name = "l2_rqsts.pf_miss", |
| 224 | }, |
| 225 | { |
| 226 | .event_code = {0x24}, |
| 227 | .umask = 0xC0, |
| 228 | .event_name = "l2_rqsts.all_pf", |
| 229 | }, |
| 230 | { |
| 231 | .event_code = {0x27}, |
| 232 | .umask = 0x01, |
| 233 | .event_name = "l2_store_lock_rqsts.miss", |
| 234 | }, |
| 235 | { |
| 236 | .event_code = {0x27}, |
| 237 | .umask = 0x04, |
| 238 | .event_name = "l2_store_lock_rqsts.hit_e", |
| 239 | }, |
| 240 | { |
| 241 | .event_code = {0x27}, |
| 242 | .umask = 0x08, |
| 243 | .event_name = "l2_store_lock_rqsts.hit_m", |
| 244 | }, |
| 245 | { |
| 246 | .event_code = {0x27}, |
| 247 | .umask = 0x0F, |
| 248 | .event_name = "l2_store_lock_rqsts.all", |
| 249 | }, |
| 250 | { |
| 251 | .event_code = {0x28}, |
| 252 | .umask = 0x01, |
| 253 | .event_name = "l2_l1d_wb_rqsts.miss", |
| 254 | }, |
| 255 | { |
| 256 | .event_code = {0x28}, |
| 257 | .umask = 0x02, |
| 258 | .event_name = "l2_l1d_wb_rqsts.hit_s", |
| 259 | }, |
| 260 | { |
| 261 | .event_code = {0x28}, |
| 262 | .umask = 0x04, |
| 263 | .event_name = "l2_l1d_wb_rqsts.hit_e", |
| 264 | }, |
| 265 | { |
| 266 | .event_code = {0x28}, |
| 267 | .umask = 0x08, |
| 268 | .event_name = "l2_l1d_wb_rqsts.hit_m", |
| 269 | }, |
| 270 | { |
| 271 | .event_code = {0x28}, |
| 272 | .umask = 0x0F, |
| 273 | .event_name = "l2_l1d_wb_rqsts.all", |
| 274 | }, |
| 275 | { |
| 276 | .event_code = {0x2E}, |
| 277 | .umask = 0x41, |
| 278 | .event_name = "longest_lat_cache.miss", |
| 279 | }, |
| 280 | { |
| 281 | .event_code = {0x2E}, |
| 282 | .umask = 0x4F, |
| 283 | .event_name = "longest_lat_cache.reference", |
| 284 | }, |
| 285 | { |
| 286 | .event_code = {0x3C}, |
| 287 | .umask = 0x00, |
| 288 | .event_name = "cpu_clk_unhalted.thread_p", |
| 289 | }, |
| 290 | { |
| 291 | .event_code = {0x3C}, |
| 292 | .umask = 0x00, |
| 293 | .event_name = "cpu_clk_unhalted.thread_p_any", |
| 294 | }, |
| 295 | { |
| 296 | .event_code = {0x3C}, |
| 297 | .umask = 0x01, |
| 298 | .event_name = "cpu_clk_thread_unhalted.ref_xclk", |
| 299 | }, |
| 300 | { |
| 301 | .event_code = {0x3C}, |
| 302 | .umask = 0x02, |
| 303 | .event_name = "cpu_clk_thread_unhalted.one_thread_active", |
| 304 | }, |
| 305 | { |
| 306 | .event_code = {0x48}, |
| 307 | .umask = 0x01, |
| 308 | .event_name = "l1d_pend_miss.pending", |
| 309 | }, |
| 310 | { |
| 311 | .event_code = {0x48}, |
| 312 | .umask = 0x01, |
| 313 | .event_name = "l1d_pend_miss.pending_cycles", |
| 314 | }, |
| 315 | { |
| 316 | .event_code = {0x49}, |
| 317 | .umask = 0x01, |
| 318 | .event_name = "dtlb_store_misses.miss_causes_a_walk", |
| 319 | }, |
| 320 | { |
| 321 | .event_code = {0x49}, |
| 322 | .umask = 0x02, |
| 323 | .event_name = "dtlb_store_misses.walk_completed", |
| 324 | }, |
| 325 | { |
| 326 | .event_code = {0x49}, |
| 327 | .umask = 0x04, |
| 328 | .event_name = "dtlb_store_misses.walk_duration", |
| 329 | }, |
| 330 | { |
| 331 | .event_code = {0x49}, |
| 332 | .umask = 0x10, |
| 333 | .event_name = "dtlb_store_misses.stlb_hit", |
| 334 | }, |
| 335 | { |
| 336 | .event_code = {0x4C}, |
| 337 | .umask = 0x01, |
| 338 | .event_name = "load_hit_pre.sw_pf", |
| 339 | }, |
| 340 | { |
| 341 | .event_code = {0x4C}, |
| 342 | .umask = 0x02, |
| 343 | .event_name = "load_hit_pre.hw_pf", |
| 344 | }, |
| 345 | { |
| 346 | .event_code = {0x4E}, |
| 347 | .umask = 0x02, |
| 348 | .event_name = "hw_pre_req.dl1_miss", |
| 349 | }, |
| 350 | { |
| 351 | .event_code = {0x4F}, |
| 352 | .umask = 0x10, |
| 353 | .event_name = "ept.walk_cycles", |
| 354 | }, |
| 355 | { |
| 356 | .event_code = {0x51}, |
| 357 | .umask = 0x01, |
| 358 | .event_name = "l1d.replacement", |
| 359 | }, |
| 360 | { |
| 361 | .event_code = {0x51}, |
| 362 | .umask = 0x02, |
| 363 | .event_name = "l1d.allocated_in_m", |
| 364 | }, |
| 365 | { |
| 366 | .event_code = {0x51}, |
| 367 | .umask = 0x04, |
| 368 | .event_name = "l1d.eviction", |
| 369 | }, |
| 370 | { |
| 371 | .event_code = {0x51}, |
| 372 | .umask = 0x08, |
| 373 | .event_name = "l1d.all_m_replacement", |
| 374 | }, |
| 375 | { |
| 376 | .event_code = {0x59}, |
| 377 | .umask = 0x20, |
| 378 | .event_name = "partial_rat_stalls.flags_merge_uop", |
| 379 | }, |
| 380 | { |
| 381 | .event_code = {0x59}, |
| 382 | .umask = 0x20, |
| 383 | .event_name = "partial_rat_stalls.flags_merge_uop_cycles", |
| 384 | }, |
| 385 | { |
| 386 | .event_code = {0x59}, |
| 387 | .umask = 0x40, |
| 388 | .event_name = "partial_rat_stalls.slow_lea_window", |
| 389 | }, |
| 390 | { |
| 391 | .event_code = {0x59}, |
| 392 | .umask = 0x80, |
| 393 | .event_name = "partial_rat_stalls.mul_single_uop", |
| 394 | }, |
| 395 | { |
| 396 | .event_code = {0x5B}, |
| 397 | .umask = 0x0C, |
| 398 | .event_name = "resource_stalls2.all_fl_empty", |
| 399 | }, |
| 400 | { |
| 401 | .event_code = {0x5B}, |
| 402 | .umask = 0x0F, |
| 403 | .event_name = "resource_stalls2.all_prf_control", |
| 404 | }, |
| 405 | { |
| 406 | .event_code = {0x5B}, |
| 407 | .umask = 0x40, |
| 408 | .event_name = "resource_stalls2.bob_full", |
| 409 | }, |
| 410 | { |
| 411 | .event_code = {0x5B}, |
| 412 | .umask = 0x4F, |
| 413 | .event_name = "resource_stalls2.ooo_rsrc", |
| 414 | }, |
| 415 | { |
| 416 | .event_code = {0x5C}, |
| 417 | .umask = 0x01, |
| 418 | .event_name = "cpl_cycles.ring0", |
| 419 | }, |
| 420 | { |
| 421 | .event_code = {0x5C}, |
| 422 | .umask = 0x01, |
| 423 | .event_name = "cpl_cycles.ring0_trans", |
| 424 | }, |
| 425 | { |
| 426 | .event_code = {0x5C}, |
| 427 | .umask = 0x02, |
| 428 | .event_name = "cpl_cycles.ring123", |
| 429 | }, |
| 430 | { |
| 431 | .event_code = {0x5E}, |
| 432 | .umask = 0x01, |
| 433 | .event_name = "rs_events.empty_cycles", |
| 434 | }, |
| 435 | { |
| 436 | .event_code = {0x5E}, |
| 437 | .umask = 0x01, |
| 438 | .event_name = "rs_events.empty_end", |
| 439 | }, |
| 440 | { |
| 441 | .event_code = {0x60}, |
| 442 | .umask = 0x01, |
| 443 | .event_name = "offcore_requests_outstanding.demand_data_rd", |
| 444 | }, |
| 445 | { |
| 446 | .event_code = {0x60}, |
| 447 | .umask = 0x01, |
| 448 | .event_name = "offcore_requests_outstanding.cycles_with_demand_data_rd", |
| 449 | }, |
| 450 | { |
| 451 | .event_code = {0x60}, |
| 452 | .umask = 0x04, |
| 453 | .event_name = "offcore_requests_outstanding.demand_rfo", |
| 454 | }, |
| 455 | { |
| 456 | .event_code = {0x60}, |
| 457 | .umask = 0x04, |
| 458 | .event_name = "offcore_requests_outstanding.cycles_with_demand_rfo", |
| 459 | }, |
| 460 | { |
| 461 | .event_code = {0x60}, |
| 462 | .umask = 0x08, |
| 463 | .event_name = "offcore_requests_outstanding.all_data_rd", |
| 464 | }, |
| 465 | { |
| 466 | .event_code = {0x60}, |
| 467 | .umask = 0x08, |
| 468 | .event_name = "offcore_requests_outstanding.cycles_with_data_rd", |
| 469 | }, |
| 470 | { |
| 471 | .event_code = {0x63}, |
| 472 | .umask = 0x01, |
| 473 | .event_name = "lock_cycles.split_lock_uc_lock_duration", |
| 474 | }, |
| 475 | { |
| 476 | .event_code = {0x63}, |
| 477 | .umask = 0x02, |
| 478 | .event_name = "lock_cycles.cache_lock_duration", |
| 479 | }, |
| 480 | { |
| 481 | .event_code = {0x79}, |
| 482 | .umask = 0x02, |
| 483 | .event_name = "idq.empty", |
| 484 | }, |
| 485 | { |
| 486 | .event_code = {0x79}, |
| 487 | .umask = 0x04, |
| 488 | .event_name = "idq.mite_uops", |
| 489 | }, |
| 490 | { |
| 491 | .event_code = {0x79}, |
| 492 | .umask = 0x04, |
| 493 | .event_name = "idq.mite_cycles", |
| 494 | }, |
| 495 | { |
| 496 | .event_code = {0x79}, |
| 497 | .umask = 0x08, |
| 498 | .event_name = "idq.dsb_uops", |
| 499 | }, |
| 500 | { |
| 501 | .event_code = {0x79}, |
| 502 | .umask = 0x08, |
| 503 | .event_name = "idq.dsb_cycles", |
| 504 | }, |
| 505 | { |
| 506 | .event_code = {0x79}, |
| 507 | .umask = 0x10, |
| 508 | .event_name = "idq.ms_dsb_uops", |
| 509 | }, |
| 510 | { |
| 511 | .event_code = {0x79}, |
| 512 | .umask = 0x10, |
| 513 | .event_name = "idq.ms_dsb_cycles", |
| 514 | }, |
| 515 | { |
| 516 | .event_code = {0x79}, |
| 517 | .umask = 0x10, |
| 518 | .event_name = "idq.ms_dsb_occur", |
| 519 | }, |
| 520 | { |
| 521 | .event_code = {0x79}, |
| 522 | .umask = 0x18, |
| 523 | .event_name = "idq.all_dsb_cycles_4_uops", |
| 524 | }, |
| 525 | { |
| 526 | .event_code = {0x79}, |
| 527 | .umask = 0x18, |
| 528 | .event_name = "idq.all_dsb_cycles_any_uops", |
| 529 | }, |
| 530 | { |
| 531 | .event_code = {0x79}, |
| 532 | .umask = 0x20, |
| 533 | .event_name = "idq.ms_mite_uops", |
| 534 | }, |
| 535 | { |
| 536 | .event_code = {0x79}, |
| 537 | .umask = 0x24, |
| 538 | .event_name = "idq.all_mite_cycles_4_uops", |
| 539 | }, |
| 540 | { |
| 541 | .event_code = {0x79}, |
| 542 | .umask = 0x24, |
| 543 | .event_name = "idq.all_mite_cycles_any_uops", |
| 544 | }, |
| 545 | { |
| 546 | .event_code = {0x79}, |
| 547 | .umask = 0x30, |
| 548 | .event_name = "idq.ms_uops", |
| 549 | }, |
| 550 | { |
| 551 | .event_code = {0x79}, |
| 552 | .umask = 0x30, |
| 553 | .event_name = "idq.ms_cycles", |
| 554 | }, |
| 555 | { |
| 556 | .event_code = {0x79}, |
| 557 | .umask = 0x30, |
| 558 | .event_name = "idq.ms_switches", |
| 559 | }, |
| 560 | { |
| 561 | .event_code = {0x79}, |
| 562 | .umask = 0x3c, |
| 563 | .event_name = "idq.mite_all_uops", |
| 564 | }, |
| 565 | { |
| 566 | .event_code = {0x80}, |
| 567 | .umask = 0x01, |
| 568 | .event_name = "icache.hit", |
| 569 | }, |
| 570 | { |
| 571 | .event_code = {0x80}, |
| 572 | .umask = 0x02, |
| 573 | .event_name = "icache.misses", |
| 574 | }, |
| 575 | { |
| 576 | .event_code = {0x85}, |
| 577 | .umask = 0x01, |
| 578 | .event_name = "itlb_misses.miss_causes_a_walk", |
| 579 | }, |
| 580 | { |
| 581 | .event_code = {0x85}, |
| 582 | .umask = 0x02, |
| 583 | .event_name = "itlb_misses.walk_completed", |
| 584 | }, |
| 585 | { |
| 586 | .event_code = {0x85}, |
| 587 | .umask = 0x04, |
| 588 | .event_name = "itlb_misses.walk_duration", |
| 589 | }, |
| 590 | { |
| 591 | .event_code = {0x85}, |
| 592 | .umask = 0x10, |
| 593 | .event_name = "itlb_misses.stlb_hit", |
| 594 | }, |
| 595 | { |
| 596 | .event_code = {0x87}, |
| 597 | .umask = 0x01, |
| 598 | .event_name = "ild_stall.lcp", |
| 599 | }, |
| 600 | { |
| 601 | .event_code = {0x87}, |
| 602 | .umask = 0x04, |
| 603 | .event_name = "ild_stall.iq_full", |
| 604 | }, |
| 605 | { |
| 606 | .event_code = {0x88}, |
| 607 | .umask = 0x41, |
| 608 | .event_name = "br_inst_exec.nontaken_conditional", |
| 609 | }, |
| 610 | { |
| 611 | .event_code = {0x88}, |
| 612 | .umask = 0x81, |
| 613 | .event_name = "br_inst_exec.taken_conditional", |
| 614 | }, |
| 615 | { |
| 616 | .event_code = {0x88}, |
| 617 | .umask = 0x82, |
| 618 | .event_name = "br_inst_exec.taken_direct_jump", |
| 619 | }, |
| 620 | { |
| 621 | .event_code = {0x88}, |
| 622 | .umask = 0x84, |
| 623 | .event_name = "br_inst_exec.taken_indirect_jump_non_call_ret", |
| 624 | }, |
| 625 | { |
| 626 | .event_code = {0x88}, |
| 627 | .umask = 0x88, |
| 628 | .event_name = "br_inst_exec.taken_indirect_near_return", |
| 629 | }, |
| 630 | { |
| 631 | .event_code = {0x88}, |
| 632 | .umask = 0x90, |
| 633 | .event_name = "br_inst_exec.taken_direct_near_call", |
| 634 | }, |
| 635 | { |
| 636 | .event_code = {0x88}, |
| 637 | .umask = 0xA0, |
| 638 | .event_name = "br_inst_exec.taken_indirect_near_call", |
| 639 | }, |
| 640 | { |
| 641 | .event_code = {0x88}, |
| 642 | .umask = 0xC1, |
| 643 | .event_name = "br_inst_exec.all_conditional", |
| 644 | }, |
| 645 | { |
| 646 | .event_code = {0x88}, |
| 647 | .umask = 0xC2, |
| 648 | .event_name = "br_inst_exec.all_direct_jmp", |
| 649 | }, |
| 650 | { |
| 651 | .event_code = {0x88}, |
| 652 | .umask = 0xC4, |
| 653 | .event_name = "br_inst_exec.all_indirect_jump_non_call_ret", |
| 654 | }, |
| 655 | { |
| 656 | .event_code = {0x88}, |
| 657 | .umask = 0xC8, |
| 658 | .event_name = "br_inst_exec.all_indirect_near_return", |
| 659 | }, |
| 660 | { |
| 661 | .event_code = {0x88}, |
| 662 | .umask = 0xD0, |
| 663 | .event_name = "br_inst_exec.all_direct_near_call", |
| 664 | }, |
| 665 | { |
| 666 | .event_code = {0x88}, |
| 667 | .umask = 0xFF, |
| 668 | .event_name = "br_inst_exec.all_branches", |
| 669 | }, |
| 670 | { |
| 671 | .event_code = {0x89}, |
| 672 | .umask = 0x41, |
| 673 | .event_name = "br_misp_exec.nontaken_conditional", |
| 674 | }, |
| 675 | { |
| 676 | .event_code = {0x89}, |
| 677 | .umask = 0x81, |
| 678 | .event_name = "br_misp_exec.taken_conditional", |
| 679 | }, |
| 680 | { |
| 681 | .event_code = {0x89}, |
| 682 | .umask = 0x84, |
| 683 | .event_name = "br_misp_exec.taken_indirect_jump_non_call_ret", |
| 684 | }, |
| 685 | { |
| 686 | .event_code = {0x89}, |
| 687 | .umask = 0x88, |
| 688 | .event_name = "br_misp_exec.taken_return_near", |
| 689 | }, |
| 690 | { |
| 691 | .event_code = {0x89}, |
| 692 | .umask = 0x90, |
| 693 | .event_name = "br_misp_exec.taken_direct_near_call", |
| 694 | }, |
| 695 | { |
| 696 | .event_code = {0x89}, |
| 697 | .umask = 0xA0, |
| 698 | .event_name = "br_misp_exec.taken_indirect_near_call", |
| 699 | }, |
| 700 | { |
| 701 | .event_code = {0x89}, |
| 702 | .umask = 0xC1, |
| 703 | .event_name = "br_misp_exec.all_conditional", |
| 704 | }, |
| 705 | { |
| 706 | .event_code = {0x89}, |
| 707 | .umask = 0xC4, |
| 708 | .event_name = "br_misp_exec.all_indirect_jump_non_call_ret", |
| 709 | }, |
| 710 | { |
| 711 | .event_code = {0x89}, |
| 712 | .umask = 0xD0, |
| 713 | .event_name = "br_misp_exec.all_direct_near_call", |
| 714 | }, |
| 715 | { |
| 716 | .event_code = {0x89}, |
| 717 | .umask = 0xFF, |
| 718 | .event_name = "br_misp_exec.all_branches", |
| 719 | }, |
| 720 | { |
| 721 | .event_code = {0x9C}, |
| 722 | .umask = 0x01, |
| 723 | .event_name = "idq_uops_not_delivered.core", |
| 724 | }, |
| 725 | { |
| 726 | .event_code = {0x9C}, |
| 727 | .umask = 0x01, |
| 728 | .event_name = "idq_uops_not_delivered.cycles_0_uops_deliv.core", |
| 729 | }, |
| 730 | { |
| 731 | .event_code = {0x9C}, |
| 732 | .umask = 0x01, |
| 733 | .event_name = "idq_uops_not_delivered.cycles_le_1_uop_deliv.core", |
| 734 | }, |
| 735 | { |
| 736 | .event_code = {0x9C}, |
| 737 | .umask = 0x01, |
| 738 | .event_name = "idq_uops_not_delivered.cycles_le_2_uop_deliv.core", |
| 739 | }, |
| 740 | { |
| 741 | .event_code = {0x9C}, |
| 742 | .umask = 0x01, |
| 743 | .event_name = "idq_uops_not_delivered.cycles_le_3_uop_deliv.core", |
| 744 | }, |
| 745 | { |
| 746 | .event_code = {0x9C}, |
| 747 | .umask = 0x01, |
| 748 | .event_name = "idq_uops_not_delivered.cycles_ge_1_uop_deliv.core", |
| 749 | }, |
| 750 | { |
| 751 | .event_code = {0x9C}, |
| 752 | .umask = 0x01, |
| 753 | .event_name = "idq_uops_not_delivered.cycles_fe_was_ok", |
| 754 | }, |
| 755 | { |
| 756 | .event_code = {0xA1}, |
| 757 | .umask = 0x01, |
| 758 | .event_name = "uops_dispatched_port.port_0", |
| 759 | }, |
| 760 | { |
| 761 | .event_code = {0xA1}, |
| 762 | .umask = 0x01, |
| 763 | .event_name = "uops_dispatched_port.port_0_core", |
| 764 | }, |
| 765 | { |
| 766 | .event_code = {0xA1}, |
| 767 | .umask = 0x02, |
| 768 | .event_name = "uops_dispatched_port.port_1", |
| 769 | }, |
| 770 | { |
| 771 | .event_code = {0xA1}, |
| 772 | .umask = 0x02, |
| 773 | .event_name = "uops_dispatched_port.port_1_core", |
| 774 | }, |
| 775 | { |
| 776 | .event_code = {0xA1}, |
| 777 | .umask = 0x0C, |
| 778 | .event_name = "uops_dispatched_port.port_2", |
| 779 | }, |
| 780 | { |
| 781 | .event_code = {0xA1}, |
| 782 | .umask = 0x0C, |
| 783 | .event_name = "uops_dispatched_port.port_2_core", |
| 784 | }, |
| 785 | { |
| 786 | .event_code = {0xA1}, |
| 787 | .umask = 0x30, |
| 788 | .event_name = "uops_dispatched_port.port_3", |
| 789 | }, |
| 790 | { |
| 791 | .event_code = {0xA1}, |
| 792 | .umask = 0x30, |
| 793 | .event_name = "uops_dispatched_port.port_3_core", |
| 794 | }, |
| 795 | { |
| 796 | .event_code = {0xA1}, |
| 797 | .umask = 0x40, |
| 798 | .event_name = "uops_dispatched_port.port_4", |
| 799 | }, |
| 800 | { |
| 801 | .event_code = {0xA1}, |
| 802 | .umask = 0x40, |
| 803 | .event_name = "uops_dispatched_port.port_4_core", |
| 804 | }, |
| 805 | { |
| 806 | .event_code = {0xA1}, |
| 807 | .umask = 0x80, |
| 808 | .event_name = "uops_dispatched_port.port_5", |
| 809 | }, |
| 810 | { |
| 811 | .event_code = {0xA1}, |
| 812 | .umask = 0x80, |
| 813 | .event_name = "uops_dispatched_port.port_5_core", |
| 814 | }, |
| 815 | { |
| 816 | .event_code = {0xA2}, |
| 817 | .umask = 0x01, |
| 818 | .event_name = "resource_stalls.any", |
| 819 | }, |
| 820 | { |
| 821 | .event_code = {0xA2}, |
| 822 | .umask = 0x02, |
| 823 | .event_name = "resource_stalls.lb", |
| 824 | }, |
| 825 | { |
| 826 | .event_code = {0xA2}, |
| 827 | .umask = 0x04, |
| 828 | .event_name = "resource_stalls.rs", |
| 829 | }, |
| 830 | { |
| 831 | .event_code = {0xA2}, |
| 832 | .umask = 0x08, |
| 833 | .event_name = "resource_stalls.sb", |
| 834 | }, |
| 835 | { |
| 836 | .event_code = {0xA2}, |
| 837 | .umask = 0x0A, |
| 838 | .event_name = "resource_stalls.lb_sb", |
| 839 | }, |
| 840 | { |
| 841 | .event_code = {0xA2}, |
| 842 | .umask = 0x0E, |
| 843 | .event_name = "resource_stalls.mem_rs", |
| 844 | }, |
| 845 | { |
| 846 | .event_code = {0xA2}, |
| 847 | .umask = 0x10, |
| 848 | .event_name = "resource_stalls.rob", |
| 849 | }, |
| 850 | { |
| 851 | .event_code = {0xA2}, |
| 852 | .umask = 0xF0, |
| 853 | .event_name = "resource_stalls.ooo_rsrc", |
| 854 | }, |
| 855 | { |
| 856 | .event_code = {0xA3}, |
| 857 | .umask = 0x01, |
| 858 | .event_name = "cycle_activity.cycles_l2_pending", |
| 859 | }, |
| 860 | { |
| 861 | .event_code = {0xA3}, |
| 862 | .umask = 0x02, |
| 863 | .event_name = "cycle_activity.cycles_l1d_pending", |
| 864 | }, |
| 865 | { |
| 866 | .event_code = {0xA3}, |
| 867 | .umask = 0x04, |
| 868 | .event_name = "cycle_activity.cycles_no_dispatch", |
| 869 | }, |
| 870 | { |
| 871 | .event_code = {0xA3}, |
| 872 | .umask = 0x05, |
| 873 | .event_name = "cycle_activity.stalls_l2_pending", |
| 874 | }, |
| 875 | { |
| 876 | .event_code = {0xA3}, |
| 877 | .umask = 0x06, |
| 878 | .event_name = "cycle_activity.stalls_l1d_pending", |
| 879 | }, |
| 880 | { |
| 881 | .event_code = {0xA8}, |
| 882 | .umask = 0x01, |
| 883 | .event_name = "lsd.uops", |
| 884 | }, |
| 885 | { |
| 886 | .event_code = {0xA8}, |
| 887 | .umask = 0x01, |
| 888 | .event_name = "lsd.cycles_active", |
| 889 | }, |
| 890 | { |
| 891 | .event_code = {0xA8}, |
| 892 | .umask = 0x01, |
| 893 | .event_name = "lsd.cycles_4_uops", |
| 894 | }, |
| 895 | { |
| 896 | .event_code = {0xAB}, |
| 897 | .umask = 0x01, |
| 898 | .event_name = "dsb2mite_switches.count", |
| 899 | }, |
| 900 | { |
| 901 | .event_code = {0xAB}, |
| 902 | .umask = 0x02, |
| 903 | .event_name = "dsb2mite_switches.penalty_cycles", |
| 904 | }, |
| 905 | { |
| 906 | .event_code = {0xAC}, |
| 907 | .umask = 0x02, |
| 908 | .event_name = "dsb_fill.other_cancel", |
| 909 | }, |
| 910 | { |
| 911 | .event_code = {0xAC}, |
| 912 | .umask = 0x08, |
| 913 | .event_name = "dsb_fill.exceed_dsb_lines", |
| 914 | }, |
| 915 | { |
| 916 | .event_code = {0xAC}, |
| 917 | .umask = 0x0A, |
| 918 | .event_name = "dsb_fill.all_cancel", |
| 919 | }, |
| 920 | { |
| 921 | .event_code = {0xAE}, |
| 922 | .umask = 0x01, |
| 923 | .event_name = "itlb.itlb_flush", |
| 924 | }, |
| 925 | { |
| 926 | .event_code = {0xB0}, |
| 927 | .umask = 0x01, |
| 928 | .event_name = "offcore_requests.demand_data_rd", |
| 929 | }, |
| 930 | { |
| 931 | .event_code = {0xB0}, |
| 932 | .umask = 0x02, |
| 933 | .event_name = "offcore_requests.demand_code_rd", |
| 934 | }, |
| 935 | { |
| 936 | .event_code = {0xB0}, |
| 937 | .umask = 0x04, |
| 938 | .event_name = "offcore_requests.demand_rfo", |
| 939 | }, |
| 940 | { |
| 941 | .event_code = {0xB0}, |
| 942 | .umask = 0x08, |
| 943 | .event_name = "offcore_requests.all_data_rd", |
| 944 | }, |
| 945 | { |
| 946 | .event_code = {0xB1}, |
| 947 | .umask = 0x01, |
| 948 | .event_name = "uops_dispatched.thread", |
| 949 | }, |
| 950 | { |
| 951 | .event_code = {0xB1}, |
| 952 | .umask = 0x02, |
| 953 | .event_name = "uops_dispatched.core", |
| 954 | }, |
| 955 | { |
| 956 | .event_code = {0xB2}, |
| 957 | .umask = 0x01, |
| 958 | .event_name = "offcore_requests_buffer.sq_full", |
| 959 | }, |
| 960 | { |
| 961 | .event_code = {0xB6}, |
| 962 | .umask = 0x01, |
| 963 | .event_name = "agu_bypass_cancel.count", |
| 964 | }, |
| 965 | { |
| 966 | .event_code = {0xBD}, |
| 967 | .umask = 0x01, |
| 968 | .event_name = "tlb_flush.dtlb_thread", |
| 969 | }, |
| 970 | { |
| 971 | .event_code = {0xBD}, |
| 972 | .umask = 0x20, |
| 973 | .event_name = "tlb_flush.stlb_any", |
| 974 | }, |
| 975 | { |
| 976 | .event_code = {0xBE}, |
| 977 | .umask = 0x01, |
| 978 | .event_name = "page_walks.llc_miss", |
| 979 | }, |
| 980 | { |
| 981 | .event_code = {0xBF}, |
| 982 | .umask = 0x05, |
| 983 | .event_name = "l1d_blocks.bank_conflict_cycles", |
| 984 | }, |
| 985 | { |
| 986 | .event_code = {0xC0}, |
| 987 | .umask = 0x00, |
| 988 | .event_name = "inst_retired.any_p", |
| 989 | }, |
| 990 | { |
| 991 | .event_code = {0xC0}, |
| 992 | .umask = 0x01, |
| 993 | .event_name = "inst_retired.prec_dist", |
| 994 | }, |
| 995 | { |
| 996 | .event_code = {0xC1}, |
| 997 | .umask = 0x02, |
| 998 | .event_name = "other_assists.itlb_miss_retired", |
| 999 | }, |
| 1000 | { |
| 1001 | .event_code = {0xC1}, |
| 1002 | .umask = 0x08, |
| 1003 | .event_name = "other_assists.avx_store", |
| 1004 | }, |
| 1005 | { |
| 1006 | .event_code = {0xC1}, |
| 1007 | .umask = 0x10, |
| 1008 | .event_name = "other_assists.avx_to_sse", |
| 1009 | }, |
| 1010 | { |
| 1011 | .event_code = {0xC1}, |
| 1012 | .umask = 0x20, |
| 1013 | .event_name = "other_assists.sse_to_avx", |
| 1014 | }, |
| 1015 | { |
| 1016 | .event_code = {0xC2}, |
| 1017 | .umask = 0x01, |
| 1018 | .event_name = "uops_retired.all", |
| 1019 | }, |
| 1020 | { |
| 1021 | .event_code = {0xC2}, |
| 1022 | .umask = 0x01, |
| 1023 | .event_name = "uops_retired.stall_cycles", |
| 1024 | }, |
| 1025 | { |
| 1026 | .event_code = {0xC2}, |
| 1027 | .umask = 0x01, |
| 1028 | .event_name = "uops_retired.total_cycles", |
| 1029 | }, |
| 1030 | { |
| 1031 | .event_code = {0xC2}, |
| 1032 | .umask = 0x01, |
| 1033 | .event_name = "uops_retired.core_stall_cycles", |
| 1034 | }, |
| 1035 | { |
| 1036 | .event_code = {0xC2}, |
| 1037 | .umask = 0x02, |
| 1038 | .event_name = "uops_retired.retire_slots", |
| 1039 | }, |
| 1040 | { |
| 1041 | .event_code = {0xc3}, |
| 1042 | .umask = 0x01, |
| 1043 | .event_name = "machine_clears.count", |
| 1044 | }, |
| 1045 | { |
| 1046 | .event_code = {0xC3}, |
| 1047 | .umask = 0x02, |
| 1048 | .event_name = "machine_clears.memory_ordering", |
| 1049 | }, |
| 1050 | { |
| 1051 | .event_code = {0xC3}, |
| 1052 | .umask = 0x04, |
| 1053 | .event_name = "machine_clears.smc", |
| 1054 | }, |
| 1055 | { |
| 1056 | .event_code = {0xC3}, |
| 1057 | .umask = 0x20, |
| 1058 | .event_name = "machine_clears.maskmov", |
| 1059 | }, |
| 1060 | { |
| 1061 | .event_code = {0xC4}, |
| 1062 | .umask = 0x00, |
| 1063 | .event_name = "br_inst_retired.all_branches", |
| 1064 | }, |
| 1065 | { |
| 1066 | .event_code = {0xC4}, |
| 1067 | .umask = 0x01, |
| 1068 | .event_name = "br_inst_retired.conditional", |
| 1069 | }, |
| 1070 | { |
| 1071 | .event_code = {0xC4}, |
| 1072 | .umask = 0x02, |
| 1073 | .event_name = "br_inst_retired.near_call", |
| 1074 | }, |
| 1075 | { |
| 1076 | .event_code = {0xC4}, |
| 1077 | .umask = 0x02, |
| 1078 | .event_name = "br_inst_retired.near_call_r3", |
| 1079 | }, |
| 1080 | { |
| 1081 | .event_code = {0xC4}, |
| 1082 | .umask = 0x04, |
| 1083 | .event_name = "br_inst_retired.all_branches_pebs", |
| 1084 | }, |
| 1085 | { |
| 1086 | .event_code = {0xC4}, |
| 1087 | .umask = 0x08, |
| 1088 | .event_name = "br_inst_retired.near_return", |
| 1089 | }, |
| 1090 | { |
| 1091 | .event_code = {0xC4}, |
| 1092 | .umask = 0x10, |
| 1093 | .event_name = "br_inst_retired.not_taken", |
| 1094 | }, |
| 1095 | { |
| 1096 | .event_code = {0xC4}, |
| 1097 | .umask = 0x20, |
| 1098 | .event_name = "br_inst_retired.near_taken", |
| 1099 | }, |
| 1100 | { |
| 1101 | .event_code = {0xC4}, |
| 1102 | .umask = 0x40, |
| 1103 | .event_name = "br_inst_retired.far_branch", |
| 1104 | }, |
| 1105 | { |
| 1106 | .event_code = {0xC5}, |
| 1107 | .umask = 0x00, |
| 1108 | .event_name = "br_misp_retired.all_branches", |
| 1109 | }, |
| 1110 | { |
| 1111 | .event_code = {0xC5}, |
| 1112 | .umask = 0x01, |
| 1113 | .event_name = "br_misp_retired.conditional", |
| 1114 | }, |
| 1115 | { |
| 1116 | .event_code = {0xC5}, |
| 1117 | .umask = 0x02, |
| 1118 | .event_name = "br_misp_retired.near_call", |
| 1119 | }, |
| 1120 | { |
| 1121 | .event_code = {0xC5}, |
| 1122 | .umask = 0x04, |
| 1123 | .event_name = "br_misp_retired.all_branches_pebs", |
| 1124 | }, |
| 1125 | { |
| 1126 | .event_code = {0xC5}, |
| 1127 | .umask = 0x10, |
| 1128 | .event_name = "br_misp_retired.not_taken", |
| 1129 | }, |
| 1130 | { |
| 1131 | .event_code = {0xC5}, |
| 1132 | .umask = 0x20, |
| 1133 | .event_name = "br_misp_retired.taken", |
| 1134 | }, |
| 1135 | { |
| 1136 | .event_code = {0xCA}, |
| 1137 | .umask = 0x02, |
| 1138 | .event_name = "fp_assist.x87_output", |
| 1139 | }, |
| 1140 | { |
| 1141 | .event_code = {0xCA}, |
| 1142 | .umask = 0x04, |
| 1143 | .event_name = "fp_assist.x87_input", |
| 1144 | }, |
| 1145 | { |
| 1146 | .event_code = {0xCA}, |
| 1147 | .umask = 0x08, |
| 1148 | .event_name = "fp_assist.simd_output", |
| 1149 | }, |
| 1150 | { |
| 1151 | .event_code = {0xCA}, |
| 1152 | .umask = 0x10, |
| 1153 | .event_name = "fp_assist.simd_input", |
| 1154 | }, |
| 1155 | { |
| 1156 | .event_code = {0xCA}, |
| 1157 | .umask = 0x1E, |
| 1158 | .event_name = "fp_assist.any", |
| 1159 | }, |
| 1160 | { |
| 1161 | .event_code = {0xCC}, |
| 1162 | .umask = 0x20, |
| 1163 | .event_name = "rob_misc_events.lbr_inserts", |
| 1164 | }, |
| 1165 | { |
| 1166 | .event_code = {0xCD}, |
| 1167 | .umask = 0x02, |
| 1168 | .event_name = "mem_trans_retired.precise_store", |
| 1169 | }, |
| 1170 | { |
| 1171 | .event_code = {0xD0}, |
| 1172 | .umask = 0x11, |
| 1173 | .event_name = "mem_uops_retired.stlb_miss_loads", |
| 1174 | }, |
| 1175 | { |
| 1176 | .event_code = {0xD0}, |
| 1177 | .umask = 0x12, |
| 1178 | .event_name = "mem_uops_retired.stlb_miss_stores", |
| 1179 | }, |
| 1180 | { |
| 1181 | .event_code = {0xD0}, |
| 1182 | .umask = 0x21, |
| 1183 | .event_name = "mem_uops_retired.lock_loads", |
| 1184 | }, |
| 1185 | { |
| 1186 | .event_code = {0xD0}, |
| 1187 | .umask = 0x41, |
| 1188 | .event_name = "mem_uops_retired.split_loads", |
| 1189 | }, |
| 1190 | { |
| 1191 | .event_code = {0xD0}, |
| 1192 | .umask = 0x42, |
| 1193 | .event_name = "mem_uops_retired.split_stores", |
| 1194 | }, |
| 1195 | { |
| 1196 | .event_code = {0xD0}, |
| 1197 | .umask = 0x81, |
| 1198 | .event_name = "mem_uops_retired.all_loads", |
| 1199 | }, |
| 1200 | { |
| 1201 | .event_code = {0xD0}, |
| 1202 | .umask = 0x82, |
| 1203 | .event_name = "mem_uops_retired.all_stores", |
| 1204 | }, |
| 1205 | { |
| 1206 | .event_code = {0xD1}, |
| 1207 | .umask = 0x01, |
| 1208 | .event_name = "mem_load_uops_retired.l1_hit", |
| 1209 | }, |
| 1210 | { |
| 1211 | .event_code = {0xD1}, |
| 1212 | .umask = 0x02, |
| 1213 | .event_name = "mem_load_uops_retired.l2_hit", |
| 1214 | }, |
| 1215 | { |
| 1216 | .event_code = {0xD1}, |
| 1217 | .umask = 0x04, |
| 1218 | .event_name = "mem_load_uops_retired.llc_hit", |
| 1219 | }, |
| 1220 | { |
| 1221 | .event_code = {0xD1}, |
| 1222 | .umask = 0x40, |
| 1223 | .event_name = "mem_load_uops_retired.hit_lfb", |
| 1224 | }, |
| 1225 | { |
| 1226 | .event_code = {0xD2}, |
| 1227 | .umask = 0x01, |
| 1228 | .event_name = "mem_load_uops_llc_hit_retired.xsnp_miss", |
| 1229 | }, |
| 1230 | { |
| 1231 | .event_code = {0xD2}, |
| 1232 | .umask = 0x02, |
| 1233 | .event_name = "mem_load_uops_llc_hit_retired.xsnp_hit", |
| 1234 | }, |
| 1235 | { |
| 1236 | .event_code = {0xD2}, |
| 1237 | .umask = 0x04, |
| 1238 | .event_name = "mem_load_uops_llc_hit_retired.xsnp_hitm", |
| 1239 | }, |
| 1240 | { |
| 1241 | .event_code = {0xD2}, |
| 1242 | .umask = 0x08, |
| 1243 | .event_name = "mem_load_uops_llc_hit_retired.xsnp_none", |
| 1244 | }, |
| 1245 | { |
| 1246 | .event_code = {0xD4}, |
| 1247 | .umask = 0x02, |
| 1248 | .event_name = "mem_load_uops_misc_retired.llc_miss", |
| 1249 | }, |
| 1250 | { |
| 1251 | .event_code = {0xE6}, |
| 1252 | .umask = 0x1F, |
| 1253 | .event_name = "baclears.any", |
| 1254 | }, |
| 1255 | { |
| 1256 | .event_code = {0xF0}, |
| 1257 | .umask = 0x01, |
| 1258 | .event_name = "l2_trans.demand_data_rd", |
| 1259 | }, |
| 1260 | { |
| 1261 | .event_code = {0xF0}, |
| 1262 | .umask = 0x02, |
| 1263 | .event_name = "l2_trans.rfo", |
| 1264 | }, |
| 1265 | { |
| 1266 | .event_code = {0xF0}, |
| 1267 | .umask = 0x04, |
| 1268 | .event_name = "l2_trans.code_rd", |
| 1269 | }, |
| 1270 | { |
| 1271 | .event_code = {0xF0}, |
| 1272 | .umask = 0x08, |
| 1273 | .event_name = "l2_trans.all_pf", |
| 1274 | }, |
| 1275 | { |
| 1276 | .event_code = {0xF0}, |
| 1277 | .umask = 0x10, |
| 1278 | .event_name = "l2_trans.l1d_wb", |
| 1279 | }, |
| 1280 | { |
| 1281 | .event_code = {0xF0}, |
| 1282 | .umask = 0x20, |
| 1283 | .event_name = "l2_trans.l2_fill", |
| 1284 | }, |
| 1285 | { |
| 1286 | .event_code = {0xF0}, |
| 1287 | .umask = 0x40, |
| 1288 | .event_name = "l2_trans.l2_wb", |
| 1289 | }, |
| 1290 | { |
| 1291 | .event_code = {0xF0}, |
| 1292 | .umask = 0x80, |
| 1293 | .event_name = "l2_trans.all_requests", |
| 1294 | }, |
| 1295 | { |
| 1296 | .event_code = {0xF1}, |
| 1297 | .umask = 0x01, |
| 1298 | .event_name = "l2_lines_in.i", |
| 1299 | }, |
| 1300 | { |
| 1301 | .event_code = {0xF1}, |
| 1302 | .umask = 0x02, |
| 1303 | .event_name = "l2_lines_in.s", |
| 1304 | }, |
| 1305 | { |
| 1306 | .event_code = {0xF1}, |
| 1307 | .umask = 0x04, |
| 1308 | .event_name = "l2_lines_in.e", |
| 1309 | }, |
| 1310 | { |
| 1311 | .event_code = {0xF1}, |
| 1312 | .umask = 0x07, |
| 1313 | .event_name = "l2_lines_in.all", |
| 1314 | }, |
| 1315 | { |
| 1316 | .event_code = {0xF2}, |
| 1317 | .umask = 0x01, |
| 1318 | .event_name = "l2_lines_out.demand_clean", |
| 1319 | }, |
| 1320 | { |
| 1321 | .event_code = {0xF2}, |
| 1322 | .umask = 0x02, |
| 1323 | .event_name = "l2_lines_out.demand_dirty", |
| 1324 | }, |
| 1325 | { |
| 1326 | .event_code = {0xF2}, |
| 1327 | .umask = 0x04, |
| 1328 | .event_name = "l2_lines_out.pf_clean", |
| 1329 | }, |
| 1330 | { |
| 1331 | .event_code = {0xF2}, |
| 1332 | .umask = 0x08, |
| 1333 | .event_name = "l2_lines_out.pf_dirty", |
| 1334 | }, |
| 1335 | { |
| 1336 | .event_code = {0xF2}, |
| 1337 | .umask = 0x0A, |
| 1338 | .event_name = "l2_lines_out.dirty_all", |
| 1339 | }, |
| 1340 | { |
| 1341 | .event_code = {0xF4}, |
| 1342 | .umask = 0x10, |
| 1343 | .event_name = "sq_misc.split_lock", |
| 1344 | }, |
| 1345 | { |
| 1346 | .event_name = 0, |
| 1347 | }, |
| 1348 | }; |
| 1349 | |
| 1350 | PERFMON_REGISTER_INTEL_PMC (cpu_model_table, event_table); |
| 1351 | |