blob: f70776db5aca487b116fe05c68667a2089874f56 [file] [log] [blame]
Mohsin Kazmia0a68332020-07-16 12:55:42 +00001/*
2 * Copyright (c) 2018 Cisco and/or its affiliates.
3 * Licensed under the Apache License, Version 2.0 (the "License");
4 * you may not use this file except in compliance with the License.
5 * You may obtain a copy of the License at:
6 *
7 * http://www.apache.org/licenses/LICENSE-2.0
8 *
9 * Unless required by applicable law or agreed to in writing, software
10 * distributed under the License is distributed on an "AS IS" BASIS,
11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 * See the License for the specific language governing permissions and
13 * limitations under the License.
14 */
15
16#include <vlib/vlib.h>
17#include <vlib/pci/pci.h>
18#include <vnet/ethernet/ethernet.h>
19#include <vnet/ip/ip4_packet.h>
20#include <vnet/ip/ip6_packet.h>
21#include <vnet/devices/virtio/virtio.h>
22#include <vnet/devices/virtio/virtio_pci_legacy.h>
23#include <vnet/devices/virtio/pci.h>
24
25#define PCI_CONFIG_SIZE(vif) ((vif->msix_enabled == VIRTIO_MSIX_ENABLED) ? \
26 24 : 20)
27
28static void
29virtio_pci_legacy_read_config (vlib_main_t * vm, virtio_if_t * vif, void *dst,
30 int len, u32 addr)
31{
32 u32 size = 0;
33 vlib_pci_dev_handle_t h = vif->pci_dev_handle;
34
35 while (len > 0)
36 {
37 if (len >= 4)
38 {
39 size = 4;
40 vlib_pci_read_io_u32 (vm, h, PCI_CONFIG_SIZE (vif) + addr, dst);
41 }
42 else if (len >= 2)
43 {
44 size = 2;
45 vlib_pci_read_io_u16 (vm, h, PCI_CONFIG_SIZE (vif) + addr, dst);
46 }
47 else
48 {
49 size = 1;
50 vlib_pci_read_io_u8 (vm, h, PCI_CONFIG_SIZE (vif) + addr, dst);
51 }
52 dst = (u8 *) dst + size;
53 addr += size;
54 len -= size;
55 }
56}
57
58static void
59virtio_pci_legacy_write_config (vlib_main_t * vm, virtio_if_t * vif,
60 void *src, int len, u32 addr)
61{
62 u32 size = 0;
63 vlib_pci_dev_handle_t h = vif->pci_dev_handle;
64
65 while (len > 0)
66 {
67 if (len >= 4)
68 {
69 size = 4;
70 vlib_pci_write_io_u32 (vm, h, PCI_CONFIG_SIZE (vif) + addr, src);
71 }
72 else if (len >= 2)
73 {
74 size = 2;
75 vlib_pci_write_io_u16 (vm, h, PCI_CONFIG_SIZE (vif) + addr, src);
76 }
77 else
78 {
79 size = 1;
80 vlib_pci_write_io_u8 (vm, h, PCI_CONFIG_SIZE (vif) + addr, src);
81 }
82 src = (u8 *) src + size;
83 addr += size;
84 len -= size;
85 }
86}
87
88static u64
89virtio_pci_legacy_get_host_features (vlib_main_t * vm, virtio_if_t * vif)
90{
91 u32 host_features;
92 vlib_pci_read_io_u32 (vm, vif->pci_dev_handle, VIRTIO_PCI_HOST_FEATURES,
93 &host_features);
94 return host_features;
95}
96
97static u64
98virtio_pci_legacy_get_guest_features (vlib_main_t * vm, virtio_if_t * vif)
99{
100 u32 guest_features = 0;
101 vlib_pci_read_io_u32 (vm, vif->pci_dev_handle, VIRTIO_PCI_GUEST_FEATURES,
102 &guest_features);
103 vif->features = guest_features;
104 return guest_features;
105}
106
107static void
108virtio_pci_legacy_set_guest_features (vlib_main_t * vm, virtio_if_t * vif,
109 u64 guest_features)
110{
111 if ((guest_features >> 32) != 0)
112 {
113 clib_warning ("only 32 bit features are allowed for legacy virtio!");
114 }
115 u32 features = 0;
116 vlib_pci_write_io_u32 (vm, vif->pci_dev_handle, VIRTIO_PCI_GUEST_FEATURES,
117 (u32 *) & guest_features);
118 vlib_pci_read_io_u32 (vm, vif->pci_dev_handle, VIRTIO_PCI_GUEST_FEATURES,
119 &features);
120 if (features != (u32) guest_features)
121 {
122 clib_warning ("legacy set guest features failed!");
123 }
124}
125
126static u8
127virtio_pci_legacy_get_status (vlib_main_t * vm, virtio_if_t * vif)
128{
129 u8 status = 0;
130 vlib_pci_read_io_u8 (vm, vif->pci_dev_handle, VIRTIO_PCI_STATUS, &status);
131 return status;
132}
133
134static void
135virtio_pci_legacy_set_status (vlib_main_t * vm, virtio_if_t * vif, u8 status)
136{
137 if (status != VIRTIO_CONFIG_STATUS_RESET)
138 status |= virtio_pci_legacy_get_status (vm, vif);
139 vlib_pci_write_io_u8 (vm, vif->pci_dev_handle, VIRTIO_PCI_STATUS, &status);
140}
141
142static u8
143virtio_pci_legacy_reset (vlib_main_t * vm, virtio_if_t * vif)
144{
145 virtio_pci_legacy_set_status (vm, vif, VIRTIO_CONFIG_STATUS_RESET);
146 return virtio_pci_legacy_get_status (vm, vif);
147}
148
149static u8
150virtio_pci_legacy_get_isr (vlib_main_t * vm, virtio_if_t * vif)
151{
152 u8 isr = 0;
153 vlib_pci_read_io_u8 (vm, vif->pci_dev_handle, VIRTIO_PCI_ISR, &isr);
154 return isr;
155}
156
157static u16
158virtio_pci_legacy_get_queue_num (vlib_main_t * vm, virtio_if_t * vif,
159 u16 queue_id)
160{
161 u16 queue_num = 0;
162 vlib_pci_write_io_u16 (vm, vif->pci_dev_handle, VIRTIO_PCI_QUEUE_SEL,
163 &queue_id);
164 vlib_pci_read_io_u16 (vm, vif->pci_dev_handle, VIRTIO_PCI_QUEUE_NUM,
165 &queue_num);
166 return queue_num;
167}
168
169static void
170virtio_pci_legacy_set_queue_num (vlib_main_t * vm, virtio_if_t * vif,
171 u16 queue_id, u16 queue_size)
172{
173 /* do nothing */
174}
175
176static u8
177virtio_pci_legacy_setup_queue (vlib_main_t * vm, virtio_if_t * vif,
178 u16 queue_id, void *p)
179{
180 u64 addr = vlib_physmem_get_pa (vm, p) >> VIRTIO_PCI_QUEUE_ADDR_SHIFT;
181 u32 addr2 = 0;
182 vlib_pci_write_io_u16 (vm, vif->pci_dev_handle, VIRTIO_PCI_QUEUE_SEL,
183 &queue_id);
184 vlib_pci_write_io_u32 (vm, vif->pci_dev_handle, VIRTIO_PCI_QUEUE_PFN,
185 (u32 *) & addr);
186 vlib_pci_read_io_u32 (vm, vif->pci_dev_handle, VIRTIO_PCI_QUEUE_PFN,
187 &addr2);
188 if ((u32) addr == addr2)
189 return 0;
190
191 clib_warning ("legacy queue setup failed!");
192 return 1;
193}
194
195static void
196virtio_pci_legacy_del_queue (vlib_main_t * vm, virtio_if_t * vif,
197 u16 queue_id)
198{
199 u32 src = 0;
200 vlib_pci_write_io_u16 (vm, vif->pci_dev_handle, VIRTIO_PCI_QUEUE_SEL,
201 &queue_id);
202 vlib_pci_write_io_u32 (vm, vif->pci_dev_handle, VIRTIO_PCI_QUEUE_PFN, &src);
203}
204
205inline void
206virtio_pci_legacy_notify_queue (vlib_main_t * vm, virtio_if_t * vif,
207 u16 queue_id)
208{
209 vlib_pci_write_io_u16 (vm, vif->pci_dev_handle, VIRTIO_PCI_QUEUE_NOTIFY,
210 &queue_id);
211}
212
213/* Enable one vector (0) for Link State Intrerrupt */
214static u16
215virtio_pci_legacy_set_config_irq (vlib_main_t * vm, virtio_if_t * vif,
216 u16 vec)
217{
218 vlib_pci_write_io_u16 (vm, vif->pci_dev_handle, VIRTIO_MSI_CONFIG_VECTOR,
219 &vec);
220 vlib_pci_read_io_u16 (vm, vif->pci_dev_handle, VIRTIO_MSI_CONFIG_VECTOR,
221 &vec);
222 return vec;
223}
224
225static u16
226virtio_pci_legacy_set_queue_irq (vlib_main_t * vm, virtio_if_t * vif, u16 vec,
227 u16 queue_id)
228{
229 vlib_pci_write_io_u16 (vm, vif->pci_dev_handle, VIRTIO_PCI_QUEUE_SEL,
230 &queue_id);
231 vlib_pci_write_io_u16 (vm, vif->pci_dev_handle, VIRTIO_MSI_QUEUE_VECTOR,
232 &vec);
233 vlib_pci_read_io_u16 (vm, vif->pci_dev_handle, VIRTIO_MSI_QUEUE_VECTOR,
234 &vec);
235 return vec;
236}
237
238static void
239virtio_pci_legacy_get_mac (vlib_main_t * vm, virtio_if_t * vif)
240{
241 virtio_pci_legacy_read_config (vm, vif, vif->mac_addr,
242 sizeof (vif->mac_addr), 0);
243}
244
245static void
246virtio_pci_legacy_set_mac (vlib_main_t * vm, virtio_if_t * vif)
247{
248 virtio_pci_legacy_write_config (vm, vif, vif->mac_addr,
249 sizeof (vif->mac_addr), 0);
250}
251
252static u16
253virtio_pci_legacy_get_device_status (vlib_main_t * vm, virtio_if_t * vif)
254{
255 u16 status = 0;
256 virtio_pci_legacy_read_config (vm, vif, &status,
257 sizeof (status),
258 STRUCT_OFFSET_OF
259 (virtio_net_config_t, status));
260 return status;
261}
262
263static u16
264virtio_pci_legacy_get_max_queue_pairs (vlib_main_t * vm, virtio_if_t * vif)
265{
266 virtio_net_config_t config;
267 virtio_pci_legacy_read_config (vm, vif, &config.max_virtqueue_pairs,
268 sizeof (config.max_virtqueue_pairs),
269 STRUCT_OFFSET_OF
270 (virtio_net_config_t, max_virtqueue_pairs));
271 return config.max_virtqueue_pairs;
272}
273
274static u16
275virtio_pci_legacy_get_mtu (vlib_main_t * vm, virtio_if_t * vif)
276{
277 virtio_net_config_t config;
278 virtio_pci_legacy_read_config (vm, vif, &config.mtu,
279 sizeof (config.mtu),
280 STRUCT_OFFSET_OF (virtio_net_config_t, mtu));
281 return config.mtu;
282}
283
284
285static void
286virtio_pci_legacy_device_debug_config_space (vlib_main_t * vm,
287 virtio_if_t * vif)
288{
289 u32 data_u32;
290 u16 data_u16;
291 u8 data_u8;
292 vlib_pci_read_io_u32 (vm, vif->pci_dev_handle, VIRTIO_PCI_HOST_FEATURES,
293 &data_u32);
294 vlib_cli_output (vm, "remote features 0x%lx", data_u32);
295 vlib_pci_read_io_u32 (vm, vif->pci_dev_handle, VIRTIO_PCI_GUEST_FEATURES,
296 &data_u32);
297 vlib_cli_output (vm, "guest features 0x%lx", data_u32);
298 vlib_pci_read_io_u32 (vm, vif->pci_dev_handle, VIRTIO_PCI_QUEUE_PFN,
299 &data_u32);
300 vlib_cli_output (vm, "queue address 0x%lx", data_u32);
301 vlib_pci_read_io_u16 (vm, vif->pci_dev_handle, VIRTIO_PCI_QUEUE_NUM,
302 &data_u16);
303 vlib_cli_output (vm, "queue size 0x%x", data_u16);
304 vlib_pci_read_io_u16 (vm, vif->pci_dev_handle, VIRTIO_PCI_QUEUE_SEL,
305 &data_u16);
306 vlib_cli_output (vm, "queue select 0x%x", data_u16);
307 vlib_pci_read_io_u16 (vm, vif->pci_dev_handle, VIRTIO_PCI_QUEUE_NOTIFY,
308 &data_u16);
309 vlib_cli_output (vm, "queue notify 0x%x", data_u16);
310 vlib_pci_read_io_u8 (vm, vif->pci_dev_handle, VIRTIO_PCI_STATUS, &data_u8);
311 vlib_cli_output (vm, "status 0x%x", data_u8);
312 vlib_pci_read_io_u8 (vm, vif->pci_dev_handle, VIRTIO_PCI_ISR, &data_u8);
313 vlib_cli_output (vm, "isr 0x%x", data_u8);
314
315 if (vif->msix_enabled == VIRTIO_MSIX_ENABLED)
316 {
317 vlib_pci_read_io_u16 (vm, vif->pci_dev_handle, VIRTIO_MSI_CONFIG_VECTOR,
318 &data_u16);
319 vlib_cli_output (vm, "config vector 0x%x", data_u16);
320 u16 queue_id = 0;
321 vlib_pci_write_io_u16 (vm, vif->pci_dev_handle, VIRTIO_PCI_QUEUE_SEL,
322 &queue_id);
323 vlib_pci_read_io_u16 (vm, vif->pci_dev_handle, VIRTIO_MSI_QUEUE_VECTOR,
324 &data_u16);
325 vlib_cli_output (vm, "queue vector for queue (0) 0x%x", data_u16);
326 }
327
328 u8 mac[6];
329 virtio_pci_legacy_read_config (vm, vif, mac, sizeof (mac), 0);
330 vlib_cli_output (vm, "mac %U", format_ethernet_address, mac);
331 virtio_pci_legacy_read_config (vm, vif, &data_u16, sizeof (u16), /* offset to status */
332 6);
333 vlib_cli_output (vm, "link up/down status 0x%x", data_u16);
334 virtio_pci_legacy_read_config (vm, vif, &data_u16, sizeof (u16),
335 /* offset to max_virtqueue */ 8);
336 vlib_cli_output (vm, "num of virtqueue 0x%x", data_u16);
337 virtio_pci_legacy_read_config (vm, vif, &data_u16, sizeof (u16), /* offset to mtu */
338 10);
339 vlib_cli_output (vm, "mtu 0x%x", data_u16);
340
341 u32 i = PCI_CONFIG_SIZE (vif) + 12, a = 4;
342 i += a;
343 i &= ~a;
344 for (; i < 64; i += 4)
345 {
346 u32 data = 0;
347 vlib_pci_read_io_u32 (vm, vif->pci_dev_handle, i, &data);
348 vlib_cli_output (vm, "0x%lx", data);
349 }
350}
351
352const virtio_pci_func_t virtio_pci_legacy_func = {
353 .read_config = virtio_pci_legacy_read_config,
354 .write_config = virtio_pci_legacy_write_config,
355 .get_device_features = virtio_pci_legacy_get_host_features,
356 .get_driver_features = virtio_pci_legacy_get_guest_features,
357 .set_driver_features = virtio_pci_legacy_set_guest_features,
358 .get_status = virtio_pci_legacy_get_status,
359 .set_status = virtio_pci_legacy_set_status,
360 .device_reset = virtio_pci_legacy_reset,
361 .get_isr = virtio_pci_legacy_get_isr,
362 .get_queue_size = virtio_pci_legacy_get_queue_num,
363 .set_queue_size = virtio_pci_legacy_set_queue_num,
364 .setup_queue = virtio_pci_legacy_setup_queue,
365 .del_queue = virtio_pci_legacy_del_queue,
366 .notify_queue = virtio_pci_legacy_notify_queue,
367 .set_config_irq = virtio_pci_legacy_set_config_irq,
368 .set_queue_irq = virtio_pci_legacy_set_queue_irq,
369 .get_mac = virtio_pci_legacy_get_mac,
370 .set_mac = virtio_pci_legacy_set_mac,
371 .get_device_status = virtio_pci_legacy_get_device_status,
372 .get_max_queue_pairs = virtio_pci_legacy_get_max_queue_pairs,
373 .get_mtu = virtio_pci_legacy_get_mtu,
374 .device_debug_config_space = virtio_pci_legacy_device_debug_config_space,
375};
376
377/*
378 * fd.io coding-style-patch-verification: ON
379 *
380 * Local Variables:
381 * eval: (c-set-style "gnu")
382 * End:
383 */